-
1
-
-
67650674126
-
-
Sentaurus TCAD, Release A-2008.09 ed., Synopsys, Mountain View, CA, USA, 2008.
-
Sentaurus TCAD, Release A-2008.09 ed., Synopsys, Mountain View, CA, USA, 2008.
-
-
-
-
2
-
-
67650440353
-
Modelling and simulation of advanced annealing processes
-
A. Martinez-Limia, P. Pichler, C. Steen, S. Paul, and W. Lerch, "Modelling and simulation of advanced annealing processes," Materials Science Forum, vol. 279, pp. 573-574, 2008.
-
(2008)
Materials Science Forum
, vol.279
, pp. 573-574
-
-
Martinez-Limia, A.1
Pichler, P.2
Steen, C.3
Paul, S.4
Lerch, W.5
-
3
-
-
50349102073
-
On a computationally efficient approach to boron-intersticial clustering
-
J. Schermer, A. Martinez-Limia, P. Pichler, C. Zechner, W. Lerch, and S. Paul, "On a computationally efficient approach to boron-intersticial clustering," Solid-State Electronics, 2008.
-
(2008)
Solid-State Electronics
-
-
Schermer, J.1
Martinez-Limia, A.2
Pichler, P.3
Zechner, C.4
Lerch, W.5
Paul, S.6
-
4
-
-
0020177405
-
A modified local density approximation: Electron density in inversion layers
-
G. Paasch and H. Übensee, "A modified local density approximation: Electron density in inversion layers," Physica Status Solidi (b), vol. 113, no. 1, pp. 165-178, 1982.
-
(1982)
Physica Status Solidi (b)
, vol.113
, Issue.1
, pp. 165-178
-
-
Paasch, G.1
Übensee, H.2
-
5
-
-
0033712947
-
MOSFET modeling into the ballistic regime
-
Seattle, WA, September
-
J. Bude, "MOSFET modeling into the ballistic regime," in SISPAD, Seattle, WA, September 2000, pp. 23-26.
-
(2000)
SISPAD
, pp. 23-26
-
-
Bude, J.1
-
6
-
-
67650359991
-
Advanced annealing schemes for the 32nm node
-
C. Kampen, A. Martinez-Limia, P. Pichler, J. Lorenz, and H. Ryssel, "Advanced annealing schemes for the 32nm node," in 13th Internaltional Conference on Simulation of Semiconductor and Decices SISPAD 2008, 2008.
-
(2008)
13th Internaltional Conference on Simulation of Semiconductor and Decices SISPAD 2008
-
-
Kampen, C.1
Martinez-Limia, A.2
Pichler, P.3
Lorenz, J.4
Ryssel, H.5
-
7
-
-
20544447617
-
Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel mosfets
-
Dec
-
S. Thompson, G. Sun, K. Wu, J. Lim, and T. Nishida, "Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel mosfets," in Electron Devices Meeting, Dec. 2004, pp. 221-224.
-
(2004)
Electron Devices Meeting
, pp. 221-224
-
-
Thompson, S.1
Sun, G.2
Wu, K.3
Lim, J.4
Nishida, T.5
-
8
-
-
26444439083
-
Exploring the limits of stress-enhanced hole mobility
-
Sept
-
L. Smith, V. Moroz, G. Eneman, and et al., "Exploring the limits of stress-enhanced hole mobility," Electron Device Letters, IEEE, vol. 26, no. 9, pp. 652-654, Sept. 2005.
-
(2005)
Electron Device Letters, IEEE
, vol.26
, Issue.9
, pp. 652-654
-
-
Smith, L.1
Moroz, V.2
Eneman, G.3
and et, al.4
-
9
-
-
67650391326
-
Study of stress effect on replacement gate technology with compressive stress liner and eSiGe for pFETs
-
IEEE, September
-
S. Yamakawa, S. Mayuzumi, J. Wang, and et al., "Study of stress effect on replacement gate technology with compressive stress liner and eSiGe for pFETs," in SISPAD Conference. IEEE, September 2008, pp. 109-112.
-
(2008)
SISPAD Conference
, pp. 109-112
-
-
Yamakawa, S.1
Mayuzumi, S.2
Wang, J.3
and et, al.4
-
10
-
-
33744723814
-
-
L. Washington, F. Nouri, and e. a. S. Thirupapuliyur, pMOSFET with 200% mobility enhancement induced by multiple stressors, Electron Device Letters, IEEE, 27, no. 6, pp. 511-513, June 2006.
-
L. Washington, F. Nouri, and e. a. S. Thirupapuliyur, "pMOSFET with 200% mobility enhancement induced by multiple stressors," Electron Device Letters, IEEE, vol. 27, no. 6, pp. 511-513, June 2006.
-
-
-
-
11
-
-
49049084903
-
Alternative source/drain contact-pad architectures for contact resistance improvement in decanano-scaled CMOS devices
-
Institute of Electrical and Electronics Engineers IEEE
-
C. Kampen, A. Burenkov, J. Lorenz, and H. Ryssel, "Alternative source/drain contact-pad architectures for contact resistance improvement in decanano-scaled CMOS devices," in ULIS 2008. Institute of Electrical and Electronics Engineers IEEE, 2008, pp. 179-182.
-
(2008)
ULIS 2008
, pp. 179-182
-
-
Kampen, C.1
Burenkov, A.2
Lorenz, J.3
Ryssel, H.4
|