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Volumn , Issue , 2009, Pages 273-276

Simulation assessment of process options for advanced CMOS devices

Author keywords

[No Author keywords available]

Indexed keywords

ADVANCED CMOS DEVICE; DYNAMIC BEHAVIORS; FULLY DEPLETED SILICON ON INSULATOR MOSFETS; GATE LENGTH; MECHANICAL STRESS; MOBILITY ENHANCEMENT; NITRIDE SPACERS; OXIDE SPACERS; PMOS TRANSISTORS; SIMULATION ASSESSMENT;

EID: 67650698572     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ULIS.2009.4897589     Document Type: Conference Paper
Times cited : (2)

References (11)
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    • Seattle, WA, September
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    • Dec
    • S. Thompson, G. Sun, K. Wu, J. Lim, and T. Nishida, "Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel mosfets," in Electron Devices Meeting, Dec. 2004, pp. 221-224.
    • (2004) Electron Devices Meeting , pp. 221-224
    • Thompson, S.1    Sun, G.2    Wu, K.3    Lim, J.4    Nishida, T.5
  • 8
    • 26444439083 scopus 로고    scopus 로고
    • Exploring the limits of stress-enhanced hole mobility
    • Sept
    • L. Smith, V. Moroz, G. Eneman, and et al., "Exploring the limits of stress-enhanced hole mobility," Electron Device Letters, IEEE, vol. 26, no. 9, pp. 652-654, Sept. 2005.
    • (2005) Electron Device Letters, IEEE , vol.26 , Issue.9 , pp. 652-654
    • Smith, L.1    Moroz, V.2    Eneman, G.3    and et, al.4
  • 9
    • 67650391326 scopus 로고    scopus 로고
    • Study of stress effect on replacement gate technology with compressive stress liner and eSiGe for pFETs
    • IEEE, September
    • S. Yamakawa, S. Mayuzumi, J. Wang, and et al., "Study of stress effect on replacement gate technology with compressive stress liner and eSiGe for pFETs," in SISPAD Conference. IEEE, September 2008, pp. 109-112.
    • (2008) SISPAD Conference , pp. 109-112
    • Yamakawa, S.1    Mayuzumi, S.2    Wang, J.3    and et, al.4
  • 10
    • 33744723814 scopus 로고    scopus 로고
    • L. Washington, F. Nouri, and e. a. S. Thirupapuliyur, pMOSFET with 200% mobility enhancement induced by multiple stressors, Electron Device Letters, IEEE, 27, no. 6, pp. 511-513, June 2006.
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  • 11
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    • Alternative source/drain contact-pad architectures for contact resistance improvement in decanano-scaled CMOS devices
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.