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Volumn , Issue , 2008, Pages 377-380
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A 4-bit 10gsample/sec flash adc with merged interpolation and reference voltage
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Author keywords
Analog digital converter; And interpolation; Digital to analog converter; Phase locked loop
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Indexed keywords
ANALOG-DIGITAL CONVERTER;
AND INTERPOLATION;
CMOS PROCESS;
DIGITAL OUTPUT;
DIGITAL-TO-ANALOG CONVERTER;
DIGITAL-TO-ANALOG CONVERTERS;
FLASH ANALOG-TO-DIGITAL CONVERTERS;
FLASH-ADC;
INPUT SIGNAL;
INTERPOLATION AMPLIFIERS;
ON CHIPS;
POWER CONSUMPTION;
REFERENCE VOLTAGES;
SUPPLY VOLTAGES;
ANALOG TO DIGITAL CONVERSION;
FREQUENCY CONVERTERS;
HYBRID COMPUTERS;
MULTICARRIER MODULATION;
PHASE LOCKED LOOPS;
SPURIOUS SIGNAL NOISE;
INTERPOLATION;
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EID: 67650002016
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ASSCC.2008.4708806 Document Type: Conference Paper |
Times cited : (4)
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References (11)
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