Novel built-in current-sensor-based IDDQ testing scheme for CMOS integrated circuits

IEEE Transactions on Instrumentation and Measurement

Volumn 58, Issue 7, 2009, Pages 2196-2208

  Hsu, Chun Lung ^a   Ho, Mean Hom ^a   Lin, Chih Feng ^a,b  

^a NATIONAL DONG HWA UNIVERSITY   (Taiwan)

^b WINBOND ELECTRONICS CORPORATION   (Taiwan)

Author keywords

Area overhead; Built in current sensor (BICS); Circuit under test (CUT); Fault coverage; IDDQ testing; Static random access memory (SRAM)

Indexed keywords

AREA OVERHEAD; BUILT-IN CURRENT SENSOR (BICS); CIRCUIT UNDER TEST (CUT); FAULT COVERAGE; IDDQ TESTING; STATIC RANDOM ACCESS MEMORY (SRAM);

CMOS INTEGRATED CIRCUITS; HEAT RADIATION; INTEGRATED CIRCUITS; MOS CAPACITORS; SENSORS; STATIC RANDOM ACCESS STORAGE; TESTING;

METAL TESTING;

EID: 67649574105     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2009.2013668     Document Type: Conference Paper

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