Is IDDQ testing not applicable for deep submicron VLSI in year 2011?

Proceedings of the Asian Test Symposium

Volumn , Issue , 2000, Pages 338-343

  Lu, Chih Wen ^a   Su, Chauchin ^b   Lee, Chung Len ^c   Chen, Jwu E ^d  

^a DA YEH UNIVERSITY   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c NATIONAL CENTRAL UNIVERSITY   (Taiwan)

^d CHUNG HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

DEEP SUBMICRON VERY LARGE SCALE INTEGRATED (VLSI) CIRCUITS;

INTEGRATED CIRCUIT TESTING; STATISTICAL METHODS; VECTORS;

VLSI CIRCUITS;

EID: 0034512342     PISSN: 10817735     EISSN: None     Source Type: Journal    
DOI: 10.1109/ATS.2000.893646     Document Type: Article

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