A 1 v 23 GHz low-Noise amplifier in 45 nm planar bulk-CMOS technology with high-Q above-IC inductors

IEEE Microwave and Wireless Components Letters

Volumn 19, Issue 5, 2009, Pages 326-328

  Wang, Wen Chieh ^a   Huang, Zue Der ^a   Carchon, Geert ^b   Mercha, Abdelkarim ^b   Decoutere, Stefaan ^b   De Raedt, Walter ^b   Wu, Chung Yu ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b IMEC   (Belgium)

Author keywords

45 nm; CMOS; Electrostatic discharge (ESD) protection; K band; Low noise amplifier (LNA)

Indexed keywords

45 NM; CMOS; ELECTROSTATIC DISCHARGE (ESD) PROTECTION; K -BAND; LOW-NOISE AMPLIFIER (LNA);

CMOS INTEGRATED CIRCUITS; ELECTROSTATIC DEVICES; ELECTROSTATIC DISCHARGE; LOW NOISE AMPLIFIERS;

AUDIO FREQUENCY AMPLIFIERS;

EID: 67649277695     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2009.2017611     Document Type: Article

References (11)

1. Y. Cao, V. Issakov, and M. Tiebout, "A 2 kV ESD-protected 18 GHz LNA with 4 dB NF in 0.13 μm CMOS," in IEEE Int. Solid-State Conf. (ISSCC) Tech. Dig. Tech., Feb. 2008, pp. 194-195.
2. Y. Su and K. K. O, "An 800-μW 26-GHz CMOS tuned amplifier," in Proc. IEEE RFIC Symp., 2006, pp. 151-154.
3. L. Aspemyr, H. Jacobsson, M. Bao, H. Sjoland, M. Ferndahl, and G. Carchon, "A 15 GHz and a 20 GHz low noise amplifier in 90 nm. RF-CMOS," in Silicon Monolith. Integr. Circuits RF Syst. (SiRF),Tech. Dig., Jan. 2006, pp. 387-390.
4. E. Adatai, B. Heydari, M. Bohsali, and A. M. Niknejad, "30 GHz CMOS low noise amplifier," in Proc. IEEE RFIC Symp., 2007, pp. 625-628.
5. M. Bao, H. Jacobsson, L. Aspemyr, A. Mercha, and G. Carchon, "A 20 GHz sub-1 V low noise amplifier and a resistive mixer in 90 nm CMOS technology," in Proc. APMC, 2005, vol. 5, pp. 3326-3329.
6. S.-C. Shin, M.-D. Tsai, R.-C. Liu, K.-Y. Lin, and H. Wang, "A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 μm CMOS technology," IEEE Microw. Wireless Compon. Lett., vol. 15, no. 7, pp. 448-450, Jul. 2005.
7. K.-W. Yu, Y.-L. Lu, D.-C. Chang, V. Liang, and M. F. Chang, "K-band low-noise amplifiers using 0.18 μm CMOS technology," IEEE Micww. Wireless Compon. Lett, vol. 14, no. 3, pp. 106-108, Mar. 2004.
8. X. Guo and K. K. O, "A power efficient differential 20-GHz low noise amplifier with 5.3-GHz 3-dB bandwidth," IEEE Microw. Wireless Compon. Lett., vol. 15, no. 9, pp. 603-605, Sep. 2005.
9. T. Yao, M. Q. Gordon, K. K. W. Tang, K. H. K. Yau, M.-T. Yang, P. Schvan, and S. P. Voinigescu, "Algorithmic design of CMOS LNAs and PAs for 60-GHz radio," IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1047-1054, May 2007.
10. G. Carchon, W. D. Raedt, and E. Beyne, "Wafer-level packaging technology for high-Q on-chip inductors and transmission lines," IEEE Trans. Micww. Theory Tech., vol. 52, no. 4, pp. 1244-1251, Apr. 2004.
11. R. Brederlow, W. Weber, J. Sauerer, S. Donnay, P. Wambauq, and W. Vertregt, "A mixed-signal design, roadmap," IEEE Design Test Comput., vol. 18, no. 16, pp. 34-36, Nov./Dec. 2001.