Intrinsic limits of the sensitivity of CMOS integrated vertical Hall devices

Sensors and Actuators, A: Physical

Volumn 152, Issue 1, 2009, Pages 21-28

  Pascal, Joris ^a   Hébrard, Luc ^a   Frick, Vincent ^a   Kammerer, Jean Baptiste ^a   Blondé, Jean Philippe ^a  

^a UNIVERSITÉ DE STRASBOURG   (France)

Author keywords

CMOS technology; Hall effect; Vertical Hall device (VHD)

Indexed keywords

CMOS TECHNOLOGY; FEM CALCULATIONS; HALL PROBES; HALL VOLTAGES; INTRINSIC LIMITS; MAXIMUM SENSITIVITIES; OPTIMAL PERFORMANCE; VERTICAL HALL DEVICE (VHD);

CMOS INTEGRATED CIRCUITS; GYRATORS; HALL EFFECT; MAGNETIC FIELD EFFECTS; SIGNAL TO NOISE RATIO; THREE DIMENSIONAL;

HALL EFFECT DEVICES;

EID: 67349176078     PISSN: 09244247     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sna.2009.03.006     Document Type: Article

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