First Vertical Hall Device in standard 0.35 μm CMOS technology

Sensors and Actuators, A: Physical

Volumn 147, Issue 1, 2008, Pages 41-46

  Pascal, Joris ^a   Hébrard, Luc ^a   Kammerer, Jean Baptiste ^a   Frick, Vincent ^a   Blondé, Jean Philippe ^a  

^a Faculté de Médecine   (France)

Author keywords

Hall effect; Standard CMOS technology; Vertical Hall Device (VHD)

Indexed keywords

CMOS INTEGRATED CIRCUITS; HALL EFFECT DEVICES; NONMETALS; SILICON; STANDARDS;

1 / F NOISE; ACTIVE AREAS; CMOS TECHNOLOGIES; DEEP NWELL (DNW); FEM SIMULATIONS; HALL DEVICES; HIGH-VOLTAGE (HV); N-TYPE SILICON; OFFSET REDUCTION; ON-CHIP CIRCUITRY; STANDARD CMOS TECHNOLOGY;

TECHNOLOGY;

EID: 47649128588     PISSN: 09244247     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sna.2008.03.011     Document Type: Article

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