Real-time execution monitoring on multi-processor system-on-chip

2008 International Symposium on System-on-Chip Proceedings, SOC 2008

Volumn , Issue , 2008, Pages

  Holma, Kalle ^a   Arpinen, Tero ^a   Salminen, Erno ^a   Hännikäinen, Marko ^a   Hämäläinen, Timo D ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION MAPPING; DESIGN DECISIONS; DESIGN SPACE EXPLORATION; DRAG-AND-DROP; EXECUTION MONITORS; EXECUTION TRACE; LARGE AMOUNTS OF DATA; MONITORING TOOLS; MULTIPLE APPLICATIONS; MULTIPROCESSOR-SYSTEM; NEW APPLICATIONS; PROTOTYPING; REAL TIME EXECUTION; RUNTIME; SYSTEM LEVEL DESIGN; VIDEO CODECS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA VISUALIZATION; DESIGN; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; SPACE RESEARCH; VISUALIZATION;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 67249131549     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSOC.2008.4694872     Document Type: Conference Paper

References (18)

1. A. D. Pimentel, "A Case for Visualization-integrated System-level Design Space Exploration," in Proc. SAMOS '05, July 2005, pp. 455-464.
2. C. Stolte, R. Bosch, P. Hanrahan, and M. Rosenblum, "Visualizing application behavior on superscalar processors," in Proc. Info Vis, 1999, pp. 10-17, 141.
3. H. C. Kok, A. D. Pimentel, and L. O. Hertzberger, "Runtime Visualization of Computer Architecture Simulations," in Proc. Workshop on Performance Analysis and its Impact on Design (in conjunction with the ISCA), June 1997, pp. 15-24.
4. P. Kukkala, M. Hännikäinen, and T. D. Hämälä inen, "Performance Modeling and Reporting for the UML 2.0 Design of Embedded Systems," in Proc. Int. Symp. on SoC, Nov. 2005, pp. 50-53.
5. T. Arpinen et al., "Configurable Multiprocessor Platform with RTOS for Distributed Execution of UML 2.0 Designed Applications," in Proc. DATE, Mar. 2006, pp. 1324-1329.
6. T. Kangas et al., "UML-based Multi-Processor SoC Design Framework," ACM TECS, vol. 5, no. 2, pp. 281-320, 2006.
7. N. Delgado, A. Q. Gates, and S. Roach, "A taxonomy and catalog of runtime software-fault monitoring tools," IEEE Transactions on Software Engineering, vol. 30, no. 12, pp. 859-872, 2004.
8. M. Heath and J. Etheridge, "Visualizing the performance of parallel programs," Software, IEEE, vol. 8, no. 5, pp. 29-39, Sep 1991.
9. D. Haban and D. Wybranietz, "A hybrid monitor for behavior and performance analysis of distributed systems," IEEE Trans. Software Engineering, vol. 16, no. 2, pp. 197-211, Feb 1990.
10. J. Tsai, K.-Y. Fang, H.-Y. Chen, and Y.-D. Bi, "A noninterference monitoring and replay mechanism for real-time software testing and debugging," IEEE Trans. Software Engineering, vol. 16, no. 8, pp. 897-916, Aug 1990.
11. P. Marwedel and B. Sirocic, "Multimedia components for the visualization of dynamic behavior in computer architectures," in Proc. WCAE. New York, NY, USA: ACM, 2003, p. 13.
12. P. S. Coe, F. W. Howell, R. N. Ibbett, and L. M. Williams, "Technical note: a hierarchical computer architecture design and simulation environment," ACM Trans. Model. Comput. Simul., vol. 8, no. 4, pp. 431-446, 1998.
13. C. Ciordas, A. Hansson, K. Goossens, and T. Basten, "A monitoring-aware network-on-chip design flow," Journal of Systems Architecture, vol. 54, no. 3-4, pp. 397-410, Mar./Apr. 2008.
14. M. Hassan, E. Okushi, and M. Imai, "A SystemC simulation modeling approach for allocating task precedence graphs to multiprocessors," in Proc. ASICON '07, Oct. 2007, pp. 1205-1208.
15. A. Rasmus et al., "Flexible Management of Shared Resources on Multiprocessor System on Chip," in Proc. SPIE Electronic Imaging, Jan. 2008.
16. T. Kangas et al., "Using a Communication Generator in SoC Architecture Exploration," in Proc. Int. Symp. on SoC, Nov. 2003, pp. 105-108.
17. Open Core Protocol International Partnership (OCP-IP). (2008, May) OCP Specification 2.2. [Online]. Available: http://www.ocpip.org
18. E. Salminen, C. Grecu, T. D. Hämäläinen, and A. Ivanov. (2008, May) OCP Network-on-Chip Benchmarks Specification Part 1: Application Modeling and Hardware Description 1.0. [Online]. Available: http://www.ocpip.org