Process induced bias: A study of resist design, device node, illumination conditions and process implications

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7273, Issue , 2009, Pages

  Carcasi, Michael ^a   Scheer, Steven ^a   Fonseca, Carlos ^a   Shibata, Tsuyoshi ^b   Kosugi, Hitoshi ^b   Kondo, Yoshihiro ^b   Saito, Takashi ^b  

^a TOKYO ELECTRON AMERICA INC   (United States)

^b TOKYO ELECTRON LTD   (Japan)

Author keywords

Dose compensation; OPC integrity; PEB compensation; PIB; Process induced bias

Indexed keywords

DOSE COMPENSATION; OPC INTEGRITY; PEB COMPENSATION; PIB; PROCESS INDUCED BIAS;

DATA STORAGE EQUIPMENT; PHOTORESISTS; QUALITY ASSURANCE; SCANNING; X RAY LITHOGRAPHY;

DESIGN;

EID: 65849199641     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.814395     Document Type: Conference Paper

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