Accuracy-aware SRAM: A reconfigurable low power SRAM architecture for mobile multimedia applications

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2009, Pages 823-828

  Cho, Minki ^a   Schlessman, Jason ^b   Wolf, Wayne ^a   Mukhopadhyay, Saibal ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^b Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

HIGHER ORDERS; LOW-POWER; LOW-POWER SRAM; MANUFACTURING VARIATIONS; MOBILE MULTIMEDIA APPLICATIONS; NOMINAL VOLTAGES; PARAMETRIC FAILURES; POWER SAVINGS; RE-CONFIGURABLE; RECONFIGURABLE ARRAYS; VOLTAGE DOMAINS;

COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; IMAGE QUALITY;

STATIC RANDOM ACCESS STORAGE;

EID: 64549114898     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2009.4796582     Document Type: Conference Paper

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