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October
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Memory design using one-transistor gain cell on SOI
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Feb
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T. Ohsawa, K. Fujita, T. Higashi, Y. Iwata, T. Kajiyama, Y. Asao and K. Sunouchi, "Memory design using one-transistor gain cell on SOI," ISSCC Digest of Technical Papers, pp.152-153, Feb. 2002.
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3
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A floating-body cell fully compatible with 90-nm CMOS technology node for a 128-Mb SOI DRAM and its scalability
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March
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T. Hamamoto, Y. Minami, T. Shino, N. Kusunoki, H. Nakajima, M. Morikado, T. Yamada, K. Inoh, A. Sakamoto, T. Higashi, K. Fujita, K. Hatsuda, T. Ohsawa and A. Nitayama, "A floating-body cell fully compatible with 90-nm CMOS technology node for a 128-Mb SOI DRAM and its scalability," IEEE Trans. Electron Devices, vol.54, no.3, pp.563-571, March 2007.
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Ohsawa, T.13
Nitayama, A.14
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A new block refresh concept for SOI floating body memories
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Sept
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P. Fazan, S. Okhonin and M. Nagoga, "A new block refresh concept for SOI floating body memories," IEEE Int. SOI Conference, pp.15-16, Sept. 2003.
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Fazan, P.1
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Charge pumping in MOS devices
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March
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Array architecture of floating body cell (FBC) with quasi- shielded open bit line scheme for sub-40nm node
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October
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K. Fujita, T. Ohsawa, R. Fukuda, F. Matsuoka, T. Higashi, T. Shino and Y. Watanabe, "Array architecture of floating body cell (FBC) with quasi- shielded open bit line scheme for sub-40nm node," IEEE Int. SOI Conference, October 2008.
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Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation
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October
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H. Furuhashi, T. Shino, T. Ohsawa, F. Matsuoka, T. Higashi, Y. Minami, H. Nakajima, K. Fujita, R. Fukuda, T. Hamamoto and A. Nitayama, "Scaling scenario of floating body cell (FBC) suppressing Vth variation due to random dopant fluctuation," IEEE Int. SOI Conference, October 2008.
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Minami, Y.6
Nakajima, H.7
Fujita, K.8
Fukuda, R.9
Hamamoto, T.10
Nitayama, A.11
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8
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2 single cell operation in multi-Gbit memories confirmed by a newly developed method for measuring signal sense margin
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Dec
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2 single cell operation in multi-Gbit memories confirmed by a newly developed method for measuring signal sense margin," IEDM Tech. Dig., pp.39-42, Dec. 2007.
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Fujita, K.6
Fukuda, R.7
Ikumi, N.8
Shino, T.9
Minami, Y.10
Nakajima, H.11
Hamamoto, T.12
Nitayama, A.13
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