FBC's potential of 6F2 single cell operation in multi-gbit memories confirmed by a newly developed method for measuring signal sense margin

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2007, Pages 39-42

  Matsuoka, Fumiyoshi ^a   Ohsawa, Takashi ^a   Higashi, Tomoki ^a   Furuhashi, Hironobu ^a   Hatsuda, Kosuke ^a   Fujita, Katsuyuki ^a   Fukuda, Ryo ^a   Ikumi, Nobuyuki ^a   Shino, Tomoaki ^a   Minami, Yoshihiro ^a   Nakajima, Hiroomi ^a   Hamamoto, Takeshi ^a   Nitayama, Akihiro ^a   Watanabe, Yohji ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON DEVICES;

EID: 50249172310     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2007.4418857     Document Type: Conference Paper

References (3)

1. T. Shino et al., "Floating Body RAM technology and its scalability to 32nm node and beyond," in IEDM Tech. Dig., 2006, pp.569-572.
2. T. Ohsawa et al., "A 128Mb Floating Body RAM (FBRAM) on SOI with multi-averaging scheme of dummy cell," in Symp. VLSI Circuits Dig., Jun. 2006, pp.224-225.
3. Y. Minami, et al., "A Floatin Body Cell (FBC) fully compatible with 90nm CMOS technology (CMOSIV) for 128Mb SOI DRAM," in IEDM Tech. Dig., 2005, pp.317-230.