Setting up 3D sequential integration for back-illuminated CMOS image sensors with highly miniaturized pixels with Low temperature fully depleted SOI transistors

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2008, Pages

  Coudrain, Perceval ^a,b,c   Batude, Perrine ^b   Gagnard, Xavier ^a   Leyris, Cédric ^a   Ricq, Stéphane ^a   Vinet, Maud ^b   Pouydebasque, Arnaud ^b   Moussy, Norbert ^b   Cazaux, Yvon ^b   Giffard, Benoit ^b   Magnan, Pierre ^c   Ancey, Pascal ^a  

^a STMICROELECTRONICS   (France)

^b CEA LETI   (France)

^c Institut Supérieur de   (France)

Author keywords

[No Author keywords available]

Indexed keywords

3-D ARCHITECTURES; BACK-ILLUMINATED; CMOS IMAGE SENSORS; COMPREHENSIVE STUDIES; DIRECT BONDINGS; FULLY DEPLETED; FULLY DEPLETED SOI; HIGH QUALITIES; LOW NOISE; LOW TEMPERATURES; NOISE LEVELS; READOUT TRANSISTORS; SILICON LAYERS; THERMAL BUDGET LIMITS; TRANSFER GATES;

BONDING; ELECTRON DEVICES; HAFNIUM COMPOUNDS; IMAGE SENSORS; THREE DIMENSIONAL; TIN; TITANIUM COMPOUNDS; TITANIUM NITRIDE;

PIXELS;

EID: 64549097170     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2008.4796670     Document Type: Conference Paper

References (9)

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