A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 3, 2002, Pages 450-454

  Kumaki, Satoshi ^a   Takata, Hidehiro ^a   Ajioka, Yoshihide ^a   Ooishi, Tsukasa ^a   Ishihara, Kazuya ^a   Hanami, Atsuo ^a   Tsuji, Takaharu ^a   Watanabe, Tetsuya ^a   Morishima, Chikayoshi ^a   Yoshizawa, Tomoaki ^a   Sato, Hidenori ^a   Hattori, Shin Ichi ^a   Koshio, Atsushi ^b   Tsukamoto, Kazuhiro ^a   Matsumura, Tetsuya ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

Embedded DRAM; HDTV; MPEG 2; Video coding

Indexed keywords

DYNAMIC RANDOM ACCESS STORAGE; HIGH DEFINITION TELEVISION; IMAGE CODING; IMAGE QUALITY; LOGIC GATES; MULTICHIP MODULES; SIGNAL ENCODING;

SYSTEM ENCODERS;

LSI CIRCUITS;

EID: 6444245114     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.987099     Document Type: Article

References (8)

1. A single-chip MPEG-2 video audio and system encoder
2. A single-chip MPEG2 422@ML video, audio, and system encoder with a 162 MHz media-processor and dual motion estimation cores
3. Super ENC: MPEG-2 video encoder chip
4. High density embedded DRAM technology with 0.38 μm pitch in DRAM and 0.42 μm pitch in LOGIC by W/PolySi gate and Cu dual Damascene metallization
5. A 2 V 250 MHz VLIW multimedia processor
6. A single-chip MPEG-2 422P@ML video, audio, and system encoder with a 162 MHz media-processor core and dual motion estimation cores
7. A 1.0 V 230 MHz column-access embedded DRAM macro for portable MPEG applications