A 1.0V 230MHz column-access embedded DRAM macro for portable MPEG applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2001, Pages 384-385+469

  Tomishima, S ^a   Tsuji, T ^a   Kawasaki, T ^a   Ishikawa, M ^a   Inokuchi, T ^a   Kato, H ^a   Tanizaki, H ^a   Abe, W ^a   Shibayama, A ^a   Fukushima, Y ^a   Niiro, M ^a   Maruta, M ^a   Uchikoba, T ^a   Senoh, M ^a   Sakamoto, S ^a   Ooishi, T ^a   Kikukawa, H ^a   Hidaka, H ^a   Takahashi, K ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BUSBARS; CLOCKS; EMBEDDED SYSTEMS; FLIP FLOP CIRCUITS; LSI CIRCUITS; MOSFET DEVICES; POWER SUPPLY CIRCUITS;

INPUT OUTPUT BUSES; MEMORY SUB-CLOCKS; VOLTAGE DOWNCONVERTER;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0035058238     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. A 56.8GB/s 0.18μm embedded DRAM macro with dual port sense amplifier for 3D graphic controller
2. High density embedded DRAM technology with .38μm pitch in DRAM and 0.42μm pitch in LOGIC by W/PolySi gate and Cu dual damascene metalization