Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing

Proceedings - 1st International Workshop on High-Performance Reconfigurable Computing Technology and Applications, HPRCTA'07, Held in Conjunction with SC07

Volumn , Issue , 2007, Pages 11-20

  El Araby, Esam ^a   Gonzalez, Ivan ^a   El Ghazawi, Tarek ^a  

^a GEORGE WASHINGTON UNIVERSITY   (United States)

Author keywords

Dynamic partial reconfiguration; Field programmable gate arrays (fpga); High performance computing; Reconfigurable computing

Indexed keywords

DYNAMIC PARTIAL RECONFIGURATION; EXECUTION MODEL; HIGH PERFORMANCE COMPUTING; OPTIMAL UTILIZATION; PARTIAL RUN-TIME RECONFIGURATION; PERFORMANCE BOUNDS; POSSIBLE FUTURES; RECONFIGURABLE COMPUTING; RUN-TIME RECONFIGURATION;

COMPUTER SOFTWARE SELECTION AND EVALUATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

RECONFIGURABLE HARDWARE;

EID: 62949243360     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1328554.1328561     Document Type: Conference Paper

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