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Volumn 53, Issue 9, 2006, Pages 921-925

A New Simultaneous Multislope ADC Architecture for Array Implementations

Author keywords

Analog; digital (AID) conversion CMOS image sensors (CISs) simultaneous mul tislope (SMS) single slope; digital converter (ADC) analog

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; IMAGE SENSORS;

EID: 34047110171     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.881817     Document Type: Article
Times cited : (16)

References (8)
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  • 2
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    • Decker, S.1    McGrath, R.D.2    Brehmer, K.3    Sodini, C.G.4
  • 4
    • 0034428238 scopus 로고    scopus 로고
    • A 60 mW 10b CMOS image sensor with column-to-column FPN reduction
    • T. Sugiki, “A 60 mW 10b CMOS image sensor with column-to-column FPN reduction,” in Dig. Tech. Papers IEEE ISSCC, 2000, pp. 108–109.
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    • Sugiki, T.1
  • 5
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    • A multiresolution 100-GOPS 4-Gpixels/s programmable smart vision sensor for multisense imaging
    • Jun
    • L. Lindgren, J. Melander, R. Johansson, and B. Moller, “A multiresolution 100-GOPS 4-Gpixels/s programmable smart vision sensor for multisense imaging,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1350–1359, Jun. 2005.
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    • Krymski, A.I.1    Tu, N.2
  • 8
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    • Elimination of quantization effects in measured temporal noise
    • May
    • L. Lindgren, “Elimination of quantization effects in measured temporal noise,” in Proc. IEEE Int. Symp. Circuits Syst., May 2004, vol. 4, pp. 392–395.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.