Distributed pinning spot model for high-k insulator - III-V semiconductor interfaces

e-Journal of Surface Science and Nanotechnology

Volumn 7, Issue , 2009, Pages 122-128

  Akazawa, Masamichi ^a   Hasegawa, Hideki ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

Fermi level pinning; Gallium arsenide; Interface states; Metal insulator semiconductor (MIS) structures; Semiconductor insulator interfaces

Indexed keywords

GALLIUM ARSENIDE; HAFNIUM OXIDES; III-V SEMICONDUCTORS; METAL INSULATOR BOUNDARIES; MIS DEVICES; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING SILICON; SEMICONDUCTOR INSULATOR BOUNDARIES;

FERMI LEVEL PINNING; FREQUENCY DEPENDENCE; HIGH-K GATE STACKS; III-V SEMICONDUCTOR INTERFACES; INTERFACE STATE DENSITY; LOW DIMENSIONAL STRUCTURE; METAL INSULATOR SEMICONDUCTOR STRUCTURES; SEMICONDUCTOR-INSULATOR INTERFACE;

INTERFACE STATES;

EID: 62749117304     PISSN: None     EISSN: 13480391     Source Type: Journal    
DOI: 10.1380/ejssnt.2009.122     Document Type: Article

References (12)

1. H. Hasegawa, Thin Solid Films 367, 58 (2000).
2. Y. G. Xie, S. Kasai, H. Takahashi, C. Jiang, and H. Hasegawa, IEEE Electron Device Lett. 22, 312 (2001).
3. K. Rajagopalan, J. Abrokwah, R. Droopad, and M. Passlack, IEEE Electron Device Lett. 27, 959 (2006).
4. Y. Xuan, Y. Q. Wu, and P. D. Ye, IEEE Electron Device Lett. 29, 294 (2008).
5. M. Akazawa and H. Hasegawa, J. Vac. Sci. Technol. B 25, 1481 (2007).
6. M. Akazawa and H. Hasegawa, J. Vac. Sci. Technol. B 26, 1569 (2008).
7. M. Akazawa and H. Hasegawa, to be published in Proceedings of EXMATEC2008 (Lodz, Poland, July 2008).
8. E. H. Nicollian and J. R. Brews, MOS Physics and Technology (Wiley, New York, 1982).
9. R. T. Tung, Phys. Rev. B 45, 13509 (1992).
10. H. Preier, Appl. Phys. Lett. 10, 361 (1967).
11. T. Sawada and H. Hasegawa, Phys. Stat. Solidi (a) 54, 689 (1979).
12. H. Hasegawa, T. Sato, and S. Kasai, Appl. Surf. Sci. 166, 92 (2000).