-
3
-
-
3042662150
-
Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors
-
Paris, France, p, Feb
-
I. Kadayif, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, I. Kolcu. Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessors. In Proceedings of Design, Automation and Test in Europe (DATE'04). Paris, France, p. 1158-1163. Feb. 2004.
-
(2004)
Proceedings of Design, Automation and Test in Europe (DATE'04)
, pp. 1158-1163
-
-
Kadayif, I.1
Kandemir, M.2
Vijaykrishnan, N.3
Irwin, M.J.4
Kolcu, I.5
-
4
-
-
0036045542
-
-
I. Kadayif, M. Kandemir, U. Sezer. An Integer Linear Programming Based Approach for Parallelizing Applications in On-Chip Multiprocessors. In Proceedings of the 39th IEEE/ACM Design Automation Conference (DAC'02). New Orleans, LA, USA. p.703-708. June 10-14 2002.
-
I. Kadayif, M. Kandemir, U. Sezer. An Integer Linear Programming Based Approach for Parallelizing Applications in On-Chip Multiprocessors. In Proceedings of the 39th IEEE/ACM Design Automation Conference (DAC'02). New Orleans, LA, USA. p.703-708. June 10-14 2002.
-
-
-
-
5
-
-
23944495257
-
Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems
-
Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin H. -M Sha. Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems.In Proceedings of the 2005 11th International Conference on Parallel and Distributed Systems (ICPADS'05).2005.
-
(2005)
Proceedings of the 2005 11th International Conference on Parallel and Distributed Systems (ICPADS'05)
-
-
Chen, Y.1
Shao, Z.2
Zhuge, Q.3
Xue, C.4
Xiao, B.5
Sha, E.H.-M.6
-
7
-
-
0035279683
-
Intra-Task Voltage Scheduling for Low-Energy Hard Real-Time Applications
-
March
-
D. Shin, J. Kim, S. Lee. Intra-Task Voltage Scheduling for Low-Energy Hard Real-Time Applications. IEEE Design & Test of Computers, 18(2). p. 20-30. March 2001.
-
(2001)
IEEE Design & Test of Computers
, vol.18
, Issue.2
, pp. 20-30
-
-
Shin, D.1
Kim, J.2
Lee, S.3
-
8
-
-
60649093614
-
Single region vs. multiple regions: A comparison of different compiler-directed dynamic voltage scheduling approaches
-
February
-
Chung-Hsing Hsu, U. Kremer. Single region vs. multiple regions: A comparison of different compiler-directed dynamic voltage scheduling approaches. In Proceedings of Workshop on Power-Aware Computer Systems (PACS-02). February 2002.
-
(2002)
Proceedings of Workshop on Power-Aware Computer Systems (PACS-02)
-
-
Chung-Hsing Hsu, U.K.1
-
10
-
-
0037702246
-
-
Fen Xie, Margaret Martonosi, Sharad Malik. Compile- Time Dynamic Voltage Scaling Settings: Opportunities and Limits. In Proceedings of ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation (PLDI-03). San Diego, California, USA. ACM Press, p.49-62. June 9-11 2003.
-
Fen Xie, Margaret Martonosi, Sharad Malik. Compile- Time Dynamic Voltage Scaling Settings: Opportunities and Limits. In Proceedings of ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation (PLDI-03). San Diego, California, USA. ACM Press, p.49-62. June 9-11 2003.
-
-
-
-
11
-
-
0036056447
-
-
I. Kadayif, M. Kandemir, M. Karakoy. An Energy Saving Strategy Based on Adaptive Loop Parallelization. In Proceedings of Design Automation Conference (DAC'02). New Orleans, Louisiana, USA. p. 195-200. June 10-14 2002.
-
I. Kadayif, M. Kandemir, M. Karakoy. An Energy Saving Strategy Based on Adaptive Loop Parallelization. In Proceedings of Design Automation Conference (DAC'02). New Orleans, Louisiana, USA. p. 195-200. June 10-14 2002.
-
-
-
-
12
-
-
56349130270
-
Experiments and Improvements
-
Proceedings of the 1st International Workshop on OpenMP. Eugene, Oregon USA, June
-
Chun Huang, Xuejun Yang. CCRG OpenMP: Experiments and Improvements. In Proceedings of the 1st International Workshop on OpenMP. Eugene, Oregon USA. Lecture Notes in Computer Science 2690. p.514-521. June 2005.
-
(2005)
Lecture Notes in Computer Science
, vol.2690
, pp. 514-521
-
-
Huang, C.1
Yang, X.2
OpenMP, C.C.R.G.3
-
14
-
-
0020289466
-
Architecture and applications of the HEP multiprocessor computer system
-
B. J. Smith. Architecture and applications of the HEP multiprocessor computer system. In Proceedings of SPIE - Real-Time Signal Processing IV. p.241-248. 1981.
-
(1981)
Proceedings of SPIE - Real-Time Signal Processing IV
, pp. 241-248
-
-
Smith, B.J.1
-
15
-
-
0022150790
-
Allocating Independent Subtasks on Parallel Processors
-
C. P. Kruskal, A. Weiss. Allocating Independent Subtasks on Parallel Processors. IEEE Transactions on Software Engineering, 11(10). p. 1001-1016.1985.
-
(1985)
IEEE Transactions on Software Engineering
, vol.11
, Issue.10
, pp. 1001-1016
-
-
Kruskal, C.P.1
Weiss, A.2
-
17
-
-
60649089175
-
-
Doug Burger, Todd M. Austin. The SimpleScalar tool set, Version 2.0. Technical Report:CS-TR-1342. University of Wisconsin-Madison, July 1997
-
Doug Burger, Todd M. Austin. The SimpleScalar tool set, Version 2.0. Technical Report:CS-TR-1342. University of Wisconsin-Madison, July 1997.
-
-
-
|