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Volumn , Issue , 1999, Pages 133-135

New corner rounding process for sub-0.15 μm shallow trench isolation

Author keywords

[No Author keywords available]

Indexed keywords


EID: 60649096392     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVC.1999.820848     Document Type: Conference Paper
Times cited : (2)

References (7)
  • 2
    • 11744373007 scopus 로고    scopus 로고
    • Anomalous gate length dependence of threshold voltage of trench-isolated metal oxide semiconductor field effect transistors
    • July
    • Toshiyuki Oishi, Katsuomi Shiozawa, Akihiko Furukawa, Yuji Abe and Yasunori Tokuda. " Anomalous Gate Length Dependence of Threshold Voltage of Trench-Isolated Metal Oxide Semiconductor Field Effect Transistors " Jpn. J. Appl. Phys. p.852-854. July 1998
    • (1998) Jpn. J. Appl. Phys. , pp. 852-854
    • Oishi, T.1    Shiozawa, K.2    Furukawa, A.3    Abe, Y.4    Tokuda, Y.5
  • 3
    • 84886448064 scopus 로고    scopus 로고
    • Comer field effect of the CMP oxide recess in shallow trench isolation technology for high density plash memories
    • Danny P. Shum, J.M. Higman, M.G. Khazhinsky, K.Y. Wu, S. Kao, J.D. Burnett and C.T. Swift. " Comer Field Effect of the CMP Oxide Recess in Shallow Trench Isolation Technology for High Density Plash Memories " IEDM. p.665-668. 1997
    • (1997) IEDM , pp. 665-668
    • Shum, D.P.1    Higman, J.M.2    Khazhinsky, M.G.3    Wu, K.Y.4    Kao, S.5    Burnett, J.D.6    Swift, C.T.7
  • 4
    • 0028744093 scopus 로고
    • Characteristics of CMOS device isolation for the ULSI age
    • Andres Bryant, W. Hansch and T. Mii. " Characteristics of CMOS Device Isolation for the ULSI Age " IEDM. p.671-674. 1994
    • (1994) IEDM , pp. 671-674
    • Bryant, A.1    Hansch, W.2    Mii, T.3
  • 5
    • 0032271790 scopus 로고    scopus 로고
    • Novel comer rounding process for shallow trench isolation utilizing MSTS(Micr0-structure transformation of silicon)
    • S.Matsuda, T. Sato, H. Yoshimura, Y. Takegawa, A. Sudo, I. Mizushima, Y. Tsunashima and Y. Toyoshima. " Novel Comer Rounding Process for Shallow Trench Isolation utilizing MSTS(Micr0-Structure Transformation of Silicon) " IEDM. p.137-140. 1998
    • (1998) IEDM , pp. 137-140
    • Matsuda, S.1    Sato, T.2    Yoshimura, H.3    Takegawa, Y.4    Sudo, A.5    Mizushima, I.6    Tsunashima, Y.7    Toyoshima, Y.8
  • 7
    • 0009752195 scopus 로고    scopus 로고
    • Shallow trench isolation characteristics with high-density-plasma chemical vapor deposition gap-fill oxide for deep-submicron CMOS technologies
    • March
    • Seung-Ho Lee, J.H. Son, H.D. Lee, W. Yang and Y.J. Lee. " Shallow Trench Isolation Characteristics with High-Density-Plasma Chemical Vapor Deposition Gap-Fill Oxide for Deep-Submicron CMOS Technologies " Jpn J. Appl. Phys. p.1222-1227. March 1998
    • (1998) Jpn J. Appl. Phys. , pp. 1222-1227
    • Lee, S.-H.1    Son, J.H.2    Lee, H.D.3    Yang, W.4    Lee, Y.J.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.