An FPGA implementation of explicit-state model checking

Proceedings of the 16th IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM'08

Volumn , Issue , 2008, Pages 119-126

  Fuess, Mary Ellen ^a   Leeser, Miriam ^a  

^a NORTHEASTERN UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SOFTWARE; COMPUTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

CACHE COHERENCY PROTOCOLS; EXPLICIT-STATE MODEL CHECKING; EXPLICIT-STATE MODELS; FPGA CHIPS; FPGA IMPLEMENTATIONS; HARDWARE DESIGNS; MEMORY ARCHITECTURES; MODEL CHECKERS; PIPELINED HARDWARES; STANFORD UNIVERSITIES;

MODEL CHECKING;

EID: 60349127678     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2008.36     Document Type: Conference Paper

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