Investigation of Bias-Temperature Instability in work-function-tuned high- k/metal-gate stacks

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 27, Issue 1, 2009, Pages 459-462

  Kaczer, B ^a   Veloso, A ^a   Roussel, Ph J ^a   Grasser, T ^b   Groeseneken, G ^a,c  

^a IMEC   (Belgium)

^b INSTITUTE FOR MICROELECTRONICS   (Austria)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC DEVICES; HIGH-K DIELECTRIC; JUNCTION GATE FIELD EFFECT TRANSISTORS; SURFACE DISCHARGES;

BIAS-TEMPERATURE INSTABILITY; CAPPING LAYER; GATE METALS; HIGH-K/METAL GATES; LAYER THICKNESS; METAL GATE STACK; RECOVERY TRANSIENTS; VTH INSTABILITIES;

GATE DIELECTRICS;

EID: 59949094791     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.3054352     Document Type: Article

References (11)

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