-
1
-
-
0035051733
-
A CMOS programmable analog memory-cell array using floating-gate circuits
-
Jan
-
R. Harrison, J. Bragg, P. Hasler, B. Minch, and S. Deweerth, "A CMOS programmable analog memory-cell array using floating-gate circuits," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no. 1, pp. 4-11, Jan. 2001.
-
(2001)
IEEE Trans. Circuits Syst. I, Fundam. Theory Appl
, vol.48
, Issue.1
, pp. 4-11
-
-
Harrison, R.1
Bragg, J.2
Hasler, P.3
Minch, B.4
Deweerth, S.5
-
2
-
-
38849135421
-
A compact programmable CMOS reference with 40 UV accuracy
-
Sep
-
V. Srinivasan, G. Serrano, C. M. Twigg, and P. E. Hasler, "A compact programmable CMOS reference with 40 UV accuracy," in Proc. IEEE Custom Integr. Circuits Conf., Sep. 2006, pp. 611-614.
-
(2006)
Proc. IEEE Custom Integr. Circuits Conf
, pp. 611-614
-
-
Srinivasan, V.1
Serrano, G.2
Twigg, C.M.3
Hasler, P.E.4
-
3
-
-
33644651482
-
A precision CMOS amplifier using floating-gates for offset cancellation
-
V. Srinivasan, G. Serrano, J. Gray, and P. Hasler, "A precision CMOS amplifier using floating-gates for offset cancellation," in Proc. IEEE Custom Integr. Circuits Conf., 2005, pp. 739-742.
-
(2005)
Proc. IEEE Custom Integr. Circuits Conf
, pp. 739-742
-
-
Srinivasan, V.1
Serrano, G.2
Gray, J.3
Hasler, P.4
-
4
-
-
33847153046
-
Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method
-
May
-
A. Bandyopadyay, G. Serrano, and P. Hasler, "Programming analog computational memory elements to 0.2% accuracy over 3.5 decades using a predictive method," in Proc. Int. Symp. Circuits Syst., May 2005, pp. 2148-2151.
-
(2005)
Proc. Int. Symp. Circuits Syst
, pp. 2148-2151
-
-
Bandyopadyay, A.1
Serrano, G.2
Hasler, P.3
-
5
-
-
33644659163
-
Matia: A programmable 80 μW/frame CMOS block matrix transform imager architecture
-
Mar
-
A. Bandyopadhyay, J. Lee, R. Robucci, and P. Hasler, "Matia: A programmable 80 μW/frame CMOS block matrix transform imager architecture, IEEE J. Solid-State Circuits, vol. 41, no. 3, pp. 663-672, Mar. 2006.
-
(2006)
IEEE J. Solid-State Circuits
, vol.41
, Issue.3
, pp. 663-672
-
-
Bandyopadhyay, A.1
Lee, J.2
Robucci, R.3
Hasler, P.4
-
6
-
-
28444448056
-
Large-scale field-programmable analog arrays for analog signal processing
-
Nov
-
T. Hall, C. Twigg, J. Gray, P. Hasler, and D. Anderson, "Large-scale field-programmable analog arrays for analog signal processing," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 11, pp. 2298-2307, Nov. 2005.
-
(2005)
IEEE Trans. Circuits Syst. I, Reg. Papers
, vol.52
, Issue.11
, pp. 2298-2307
-
-
Hall, T.1
Twigg, C.2
Gray, J.3
Hasler, P.4
Anderson, D.5
-
7
-
-
34250812593
-
A low-power, programmable bandpass filter section for higher order filter applications
-
Jun
-
D. W. Graham, P. Hasler, R. Chawla, and P. D. Smith, "A low-power, programmable bandpass filter section for higher order filter applications," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 6, pp. 1165-1176, Jun. 2007.
-
(2007)
IEEE Trans. Circuits Syst. I, Reg. Papers
, vol.54
, Issue.6
, pp. 1165-1176
-
-
Graham, D.W.1
Hasler, P.2
Chawla, R.3
Smith, P.D.4
-
8
-
-
36348956891
-
An analog programmable multidimensional radial basis function based classifier
-
Oct
-
S.-Y. Peng, P. Hasler, and D. V. Anderson, "An analog programmable multidimensional radial basis function based classifier," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 10, pp. 2148-2158, Oct. 2007.
-
(2007)
IEEE Trans. Circuits Syst. I, Reg. Papers
, vol.54
, Issue.10
, pp. 2148-2158
-
-
Peng, S.-Y.1
Hasler, P.2
Anderson, D.V.3
-
9
-
-
34548860417
-
A fully integrated architecture for fast programming of floating gates
-
A. Basu and P. Hasler, "A fully integrated architecture for fast programming of floating gates," in Proc. IEEE Int. Symp. Circuits Syst., 2007, pp. 957-960.
-
(2007)
Proc. IEEE Int. Symp. Circuits Syst
, pp. 957-960
-
-
Basu, A.1
Hasler, P.2
-
11
-
-
0020086733
-
A thermionic electron emission model for charge retention in SAMOS structures
-
Feb
-
H. Nozama and S. Kokyama, "A thermionic electron emission model for charge retention in SAMOS structures," Jpn. J. Appl. Phys., vol. 21, no. 2, pp. L111-L112, Feb. 1992.
-
(1992)
Jpn. J. Appl. Phys
, vol.21
, Issue.2
-
-
Nozama, H.1
Kokyama, S.2
-
14
-
-
67649224845
-
Indirect programming of floating-gate transistors
-
May
-
D. Graham, E. Farquhar, B. Degnan, C. Gordon, and P. Hasler, "Indirect programming of floating-gate transistors," in Proc. Int. Symp. Circuit Syst., May 2005, vol. 1, pp. 2172-2175.
-
(2005)
Proc. Int. Symp. Circuit Syst
, vol.1
, pp. 2172-2175
-
-
Graham, D.1
Farquhar, E.2
Degnan, B.3
Gordon, C.4
Hasler, P.5
-
15
-
-
0037248619
-
GS for CMOS low-dropout linear regulators
-
Jan
-
GS for CMOS low-dropout linear regulators," IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 146-150, Jan. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.1
, pp. 146-150
-
-
Leung, K.N.1
Mok, P.K.T.2
-
16
-
-
0036540694
-
A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device
-
Apr
-
K. N. Leung and P. T. Mok, "A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device," IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 526-530, Apr. 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, Issue.4
, pp. 526-530
-
-
Leung, K.N.1
Mok, P.T.2
-
17
-
-
0034431439
-
A CMOS bandgap reference without resistors
-
Feb
-
A. Buck, C. McDonald, S. Lewis, and T. R. Viswanathan, "A CMOS bandgap reference without resistors," in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2000, pp. 442-443.
-
(2000)
Proc. IEEE Int. Solid-State Circuits Conf
, pp. 442-443
-
-
Buck, A.1
McDonald, C.2
Lewis, S.3
Viswanathan, T.R.4
-
18
-
-
28144457459
-
A 0.5 μA precision CMOS floating-gate analog reference
-
Feb
-
B. K. Ahuja, H. Vu, C. L. Aber, and W. Owen, "A 0.5 μA precision CMOS floating-gate analog reference," in Proc. IEEE Int. Solid-State Circuits Conf., Feb. 2005, vol. 48, pp. 286-287.
-
(2005)
Proc. IEEE Int. Solid-State Circuits Conf
, vol.48
, pp. 286-287
-
-
Ahuja, B.K.1
Vu, H.2
Aber, C.L.3
Owen, W.4
-
19
-
-
0016328924
-
A simple three-terminal IC bandgap reference
-
Dec
-
A. P. Brokaw, "A simple three-terminal IC bandgap reference," IEEE J. Solid-State Circuits, vol. SSC-9, no. 6, pp. 388-393, Dec. 1974.
-
(1974)
IEEE J. Solid-State Circuits
, vol.SSC-9
, Issue.6
, pp. 388-393
-
-
Brokaw, A.P.1
-
20
-
-
0003417349
-
-
4th ed. Hoboken, NJ: Wiley
-
P. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed. Hoboken, NJ: Wiley, 2001.
-
(2001)
Analysis and Design of Analog Integrated Circuits
-
-
Gray, P.1
Hurst, P.J.2
Lewis, S.H.3
Meyer, R.G.4
-
21
-
-
0020886241
-
A precision curvature-compensated CMOS bandgap reference
-
Dec
-
B. S. Song and P. R. Gray, "A precision curvature-compensated CMOS bandgap reference," IEEE J. Solid-State Circuits, vol. SSC-18, no. 6, pp. 634-643, Dec. 1983.
-
(1983)
IEEE J. Solid-State Circuits
, vol.SSC-18
, Issue.6
, pp. 634-643
-
-
Song, B.S.1
Gray, P.R.2
-
22
-
-
17044379840
-
Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference
-
Apr
-
P. K. T. Mok and K. N. Leung, "Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference," in Proc. IEEE Custom Integr. Circuits Conf., Apr. 2004, pp. 635-642.
-
(2004)
Proc. IEEE Custom Integr. Circuits Conf
, pp. 635-642
-
-
Mok, P.K.T.1
Leung, K.N.2
-
23
-
-
0032675035
-
A CMOS bandgap reference circuit with sub-1-V operation
-
May
-
H. Banba, H. Shiga, A. Umezawa, T. Tanzawa, S. Atsumi, and K. Sakui, "A CMOS bandgap reference circuit with sub-1-V operation," IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 670-674, May 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.5
, pp. 670-674
-
-
Banba, H.1
Shiga, H.2
Umezawa, A.3
Tanzawa, T.4
Atsumi, S.5
Sakui, K.6
-
24
-
-
0033717707
-
Design of low-voltage bandgap reference using transimpedance amplifier
-
Jun
-
Y. Jiang and E. K. F. Lee, "Design of low-voltage bandgap reference using transimpedance amplifier," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 6, pp. 552-555, Jun. 2000.
-
(2000)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.47
, Issue.6
, pp. 552-555
-
-
Jiang, Y.1
Lee, E.K.F.2
|