Error-resilient low-power viterbi decoders via state clustering

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn , Issue , 2008, Pages 221-226

  Abdallah, Rami A ^a   Shanbhag, Naresh R ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

Algorithmic noise tolerance; Error resiliency; Process variations; Viterbi decoder; Voltage overscaling

Indexed keywords

ERROR CORRECTION; PROGRAMMING THEORY; SIGNAL PROCESSING; TECHNICAL PRESENTATIONS; VITERBI ALGORITHM;

ALGORITHMIC NOISE TOLERANCE; ERROR RESILIENCY; PROCESS VARIATIONS; VITERBI DECODER; VOLTAGE OVERSCALING;

DECODING;

EID: 57849144754     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2008.4671766     Document Type: Conference Paper

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