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Volumn , Issue , 2006, Pages 205-208

Low power trellis decoder with overscaled supply voltage

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK SKEW SCHEDULING; DECODING PERFORMANCE; ENERGY CONSUMPTION; ENERGY SAVINGS; LOW POWERS; MAX LOG MAP DECODERS; SIGNAL PROCESSING SYSTEMS; SUPPLY VOLTAGES; SYSTEM LEVEL TOLERANCE; TEST VEHICLES; TRELLIS DECODING; VITERBI;

EID: 46249130359     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2006.352582     Document Type: Conference Paper
Times cited : (9)

References (9)
  • 1
    • 0036047839 scopus 로고    scopus 로고
    • Reliable and energy-efficient digital signal processing
    • June
    • N. R. Shanbhag, "Reliable and energy-efficient digital signal processing," in Proc. of Design Automation Conference, June 2002, pp. 830-835.
    • (2002) Proc. of Design Automation Conference , pp. 830-835
    • Shanbhag, N.R.1
  • 3
    • 0037306141 scopus 로고    scopus 로고
    • Low-power filtering via adaptive error-cancellation
    • Feb
    • L. Wang and N. R. Shanbhag, "Low-power filtering via adaptive error-cancellation," IEEE Transactions on Signal Processing, vol. 51, pp. 575-583, Feb. 2003.
    • (2003) IEEE Transactions on Signal Processing , vol.51 , pp. 575-583
    • Wang, L.1    Shanbhag, N.R.2
  • 4
    • 1242263405 scopus 로고    scopus 로고
    • A voltage overscaled low-power digital filter IC
    • Feb
    • R. Hegde and N. R. Shanbhag, "A voltage overscaled low-power digital filter IC," IEEE Journal of Solid-State Circuits, vol. 39, pp. 388-391, Feb. 2004.
    • (2004) IEEE Journal of Solid-State Circuits , vol.39 , pp. 388-391
    • Hegde, R.1    Shanbhag, N.R.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.