A low power turbo/Viterbi decoder for 3GPP2 applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 4, 2006, Pages 426-430

  Lin, Chien Ching ^a   Shih, Yen Hsu ^a   Chang, Hsie Chia ^a   Lee, Chen Yi ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Cache memories; Error correction; Mobile communication; Turbo; Viterbi decoding

Indexed keywords

ALGORITHMS; CHANNEL CAPACITY; ITERATIVE METHODS; MICROPROCESSOR CHIPS; REDUNDANCY; SIGNAL ENCODING; SPURIOUS SIGNAL NOISE; TRELLIS CODES; TURBO CODES; WEARABLE COMPUTERS; WIRELESS TELECOMMUNICATION SYSTEMS;

3GPP2 APPLICATIONS; DATA FLOW; SIGNAL-TO-NOISE RATIOS; VITERBI DECODING;

DECODING;

EID: 33746642196     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.874375     Document Type: Article

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