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Volumn , Issue , 2008, Pages 292-296

Linear analysis of random process variability

Author keywords

[No Author keywords available]

Indexed keywords

ALTERNATE METHODS; ANALOG DESIGNS; BRANCH CURRENTS; CIRCUIT NODES; COMPLEX MODELS; COMPUTATION TIMES; CURRENT NOISES; FITTING ERRORS; LINEAR ANALYSES; MONTE CARLO; NUMBER OF ITERATIONS; OPERATING POINTS; PROCESS VARIABILITIES; PROCESS VARIATIONS; SPEED-UP; STANDARD DEVIATIONS; TOOL MATCHES;

EID: 57849129870     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2008.4681588     Document Type: Conference Paper
Times cited : (7)

References (11)
  • 2
    • 34250721574 scopus 로고    scopus 로고
    • Mismatch Modeling and Simulation Methodology for Predicting the Output Voltage Variation of an LCD Driver
    • Nov
    • K. Hoshino and N. Shimomura, "Mismatch Modeling and Simulation Methodology for Predicting the Output Voltage Variation of an LCD Driver," in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2005, pp. 317-320.
    • (2005) Proc. IEEE Asian Solid-State Circuits Conf , pp. 317-320
    • Hoshino, K.1    Shimomura, N.2
  • 3
    • 34547332797 scopus 로고    scopus 로고
    • Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch
    • Jun
    • J. Kim, K. D. Jones, and M. A. Horowitz, "Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch," in Proc. IEEE Design Automation Conf, Jun. 2007, pp. 440-443.
    • (2007) Proc. IEEE Design Automation Conf , pp. 440-443
    • Kim, J.1    Jones, K.D.2    Horowitz, M.A.3
  • 4
    • 57849130575 scopus 로고    scopus 로고
    • Online, Available
    • UC Berkeley, "SPICE Manual," 2007. [Online]. Available: http://bwrc.eecs.berkeley.edu/Classes/IcBook/SPICE
    • (2007) SPICE Manual
    • Berkeley, U.C.1
  • 8
    • 37549006162 scopus 로고    scopus 로고
    • Rigorous Extraction of Process Variations for 65nm CMOS Design
    • Sep
    • W. Zhao et al., "Rigorous Extraction of Process Variations for 65nm CMOS Design," in Proc. IEEE European Solid-State Device Research Conf., Sep. 2007, pp. 89-92.
    • (2007) Proc. IEEE European Solid-State Device Research Conf , pp. 89-92
    • Zhao, W.1
  • 10
    • 57849098340 scopus 로고    scopus 로고
    • Online, Available
    • UC Berkeley, "BSIM4 Manual," 2007. [Online]. Available: http://www-device.eecs.berkeley.edu/~bsi.m3
    • (2007) BSIM4 Manual
    • Berkeley, U.C.1
  • 11
    • 0015110304 scopus 로고
    • Computationally Efficient Electronic-Circuit Noise Calculations
    • Aug
    • R. Rohrer, L. Nagel, R. Meyer, and L. Weber, "Computationally Efficient Electronic-Circuit Noise Calculations," IEEE J. Solid-State Circuits, vol. 6, no. 4, pp. 204-213, Aug. 1971.
    • (1971) IEEE J. Solid-State Circuits , vol.6 , Issue.4 , pp. 204-213
    • Rohrer, R.1    Nagel, L.2    Meyer, R.3    Weber, L.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.