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Volumn , Issue , 2007, Pages 440-443

Fast, non-Monte-Carlo estimation of transient performance variation due to device mismatch

Author keywords

Mismatch; Monte Carlo analysis; Simulation; Variability; Yield

Indexed keywords

CIRCUIT SIMULATION; LOGIC CIRCUITS; MONTE CARLO METHODS; SPURIOUS SIGNAL NOISE; TIME DELAY;

EID: 34547332797     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2007.375204     Document Type: Conference Paper
Times cited : (22)

References (8)
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  • 2
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    • Schenkel, F.1
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    • Oehm, J.1    Schumacher, K.2
  • 4
    • 0024029576 scopus 로고
    • Parametric Yield Optimization for MOS Circuit Blocks
    • June
    • D. E. Hocevar, et al., "Parametric Yield Optimization for MOS Circuit Blocks," IEEE Trans. on Computer-Aided Design, June 1988, pp. 645-658.
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    • Hocevar, D.E.1
  • 5
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    • Matching Properties of MOS Transistors
    • Oct
    • M. J. M. Pelgrom, et al., "Matching Properties of MOS Transistors," IEEE J. Solid-State Circuits, Oct. 1989, pp. 1433-1439.
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  • 6
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  • 7
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    • Numerical Noise Analysis for Nonlinear Circuits with a Periodic Large Signal Excitation Including Cyclostationary Noise Sources
    • Sept
    • M. Okumura, et al., "Numerical Noise Analysis for Nonlinear Circuits with a Periodic Large Signal Excitation Including Cyclostationary Noise Sources," IEEE Trans. on Circuits and Systems-I, Sept. 1993, pp. 581-590.
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  • 8
    • 0030144381 scopus 로고    scopus 로고
    • Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations
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    • A. Demir, et al., "Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations," IEEE Trans. on Computer-Aided Design, May 1996, pp. 493-505.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.