-
1
-
-
84944392430
-
Checkpoint processing and recovery: Towards scalable large instruction window processors
-
H. Akkary, R. Rajwar, and S. Srinivasan, Checkpoint processing and recovery: towards scalable large instruction window processors, MICRO-36, 2003.
-
(2003)
MICRO-36
-
-
Akkary, H.1
Rajwar, R.2
Srinivasan, S.3
-
2
-
-
0033719421
-
Wattch: A framework for architectural-level power analysis and optimization
-
D. Brooks, V. Tiwari, and M. Martonosi, Wattch: a framework for architectural-level power analysis and optimization, ISCA-27, 2000.
-
(2000)
ISCA-27
-
-
Brooks, D.1
Tiwari, V.2
Martonosi, M.3
-
4
-
-
0036294826
-
Difficult-path branch prediction using subordinate microthreads
-
R. S. Chappell, F. Tseng, A. Yoaz, Y. N. Patt, Difficult-path branch prediction using subordinate microthreads, ISCA-29, 2002.
-
(2002)
ISCA-29
-
-
Chappell, R.S.1
Tseng, F.2
Yoaz, A.3
Patt, Y.N.4
-
5
-
-
2342619439
-
Out-of-order commit processors
-
A. Cristal, D. Ortega, J. Llosa, and M. Valero, Out-of-order commit processors, HPCA-10, 2004.
-
(2004)
HPCA-10
-
-
Cristal, A.1
Ortega, D.2
Llosa, J.3
Valero, M.4
-
6
-
-
0034831217
-
Dynamic branch prediction with perceptrons
-
D. Jimenez and C. Lin, Dynamic branch prediction with perceptrons, HPCA-7, 2001.
-
(2001)
HPCA-7
-
-
Jimenez, D.1
Lin, C.2
-
8
-
-
0036286989
-
A large, fast instruction window for tolerating cache misses
-
A. R. Lebeck, J. Koppanalil, T. Li, J. Patwardhan, and E. Rotenberg, A large, fast instruction window for tolerating cache misses, ISCA-29, 2002.
-
(2002)
ISCA-29
-
-
Lebeck, A.R.1
Koppanalil, J.2
Li, T.3
Patwardhan, J.4
Rotenberg, E.5
-
9
-
-
34548234204
-
Optimizing dual-core execution for power efficiency and transient-fault recovery
-
Y. Ma, H. Gao, M. Dimitrov, and H. Zhou, Optimizing dual-core execution for power efficiency and transient-fault recovery, IEEE Trans. on Parallel and Distributed Systems, 2007.
-
(2007)
IEEE Trans. on Parallel and Distributed Systems
-
-
Ma, Y.1
Gao, H.2
Dimitrov, M.3
Zhou, H.4
-
10
-
-
0003506711
-
Combining branch predictors,
-
Technical Report, DEC
-
S. MacFarling, Combining branch predictors, Technical Report, DEC, 1993.
-
(1993)
-
-
MacFarling, S.1
-
11
-
-
24144486521
-
-
P. Michaud, A PPM-like, tag-based branch predictor, Journal of Instruction Level Parallelism, 2005.
-
P. Michaud, A PPM-like, tag-based branch predictor, Journal of Instruction Level Parallelism, 2005.
-
-
-
-
12
-
-
0034832493
-
Speculative Data-Driven Multithreading
-
A. Roth, G. S. Sohi, Speculative Data-Driven Multithreading, HPCA-7, 2001.
-
(2001)
HPCA-7
-
-
Roth, A.1
Sohi, G.S.2
-
13
-
-
33646372742
-
A case for (partially) tagged Geometric History Length Branch Prediction
-
February
-
A. Seznec, P. Michaud. A case for (partially) tagged Geometric History Length Branch Prediction. Journal of Instruction Level Parallelism, vol. 8, February 2006.
-
(2006)
Journal of Instruction Level Parallelism
, vol.8
-
-
Seznec, A.1
Michaud, P.2
-
14
-
-
57749175172
-
-
A. Seznec. A 256 Kbits L-TAGE branch predictor. In The 2nd JILP Championship Branch Prediction Competition (CBP-2), 2006.
-
A. Seznec. A 256 Kbits L-TAGE branch predictor. In The 2nd JILP Championship Branch Prediction Competition (CBP-2), 2006.
-
-
-
-
15
-
-
57749183299
-
-
A. Seznec. Looking for limits in branch prediction with the GTL predictor. In The 2nd JILP Championship Branch Prediction Competition (CBP-2), 2006.
-
A. Seznec. Looking for limits in branch prediction with the GTL predictor. In The 2nd JILP Championship Branch Prediction Competition (CBP-2), 2006.
-
-
-
-
16
-
-
0036953769
-
Automatically characterizing large scale program behavior
-
T. Sherwood, E. Perelman, G. Hamerly, and B. Calder, Automatically characterizing large scale program behavior, ASPLOS-X, 2002.
-
(2002)
ASPLOS-X
-
-
Sherwood, T.1
Perelman, E.2
Hamerly, G.3
Calder, B.4
-
17
-
-
12844269176
-
Continual flow pipelines
-
S. T. Srinivasan, R. Rajwar, H. Akkary, A. Gandhi, and M. Upton, Continual flow pipelines, ASPLOS-11, 2004.
-
(2004)
ASPLOS-11
-
-
Srinivasan, S.T.1
Rajwar, R.2
Akkary, H.3
Gandhi, A.4
Upton, M.5
-
19
-
-
57749185964
-
-
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan, Hotleakage: a temperature-aware model of sub-threshold and gate leakage for architects, Tech. Reports CS-2003-05, U. Va. Dept. of CS, 2003.
-
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan, Hotleakage: a temperature-aware model of sub-threshold and gate leakage for architects, Tech. Reports CS-2003-05, U. Va. Dept. of CS, 2003.
-
-
-
-
20
-
-
33644919336
-
Dual-core execution: Building a highly scalable single-thread instruction window
-
H. Zhou, Dual-core execution: building a highly scalable single-thread instruction window, PACT'05, 2005.
-
(2005)
PACT'05
-
-
Zhou, H.1
|