-
1
-
-
3042565410
-
Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems
-
ANDREI, A., SCHMITZ, M., ELES, P., PENG, Z., AND AL-HASHIMI, B. 2004a. Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems. In Proc. of Design Automation and Test Conference (DATE). 51.8-528.
-
(2004)
Proc. of Design Automation and Test Conference (DATE)
, pp. 518-528
-
-
Andrei, A.1
Schmitz, M.2
Eles, P.3
Peng, Z.4
Al-Hashimi, B.5
-
2
-
-
16244423681
-
Simultaneous communica-tion and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems
-
ANDREI, A., SCHMITZ, M., ELES, P., PENG, Z. AND AL-HASHIMI, B. 2004b. Simultaneous communica-tion and processor voltage scaling for dynamic and leakage energy reduction in time-constrained systems. In Proc. of lnt'l Conference on Computer Aided Design (ICCAD). 326-369.
-
(2004)
Proc. of Lnt'l Conference on Computer Aided Design (ICCAD)
, pp. 326-369
-
-
Andrei, A.1
Schmitz, M.2
Eles, P.3
Peng, Z.4
Al-Hashimi, B.5
-
3
-
-
0003057376
-
On second order sliding mode controllers
-
Springer-Verlag, New York
-
BAHTOLINI, G., FERRARA, A., LEVANT, A., AND USAI, E. 1999. On second order sliding mode controllers. Lecture Notes in Control and Information Sciences, 247. Springer-Verlag, New York. 329-350.
-
(1999)
Lecture Notes in Control and Information Sciences
, vol.247
, pp. 329-350
-
-
Bahtolini, G.1
Ferrara, A.2
Levant, A.3
Usai, E.4
-
4
-
-
0033706197
-
A survey of design techniques for system-level dynamic power management
-
June
-
BENINI, L., BOGLIOLO, A., AND DE MICHELI, G. 2000. A survey of design techniques for system-level dynamic power management. IEEE Trans, on VLSI Systems 8, 3 (June), 299-316.
-
(2000)
IEEE Trans, on VLSI Systems
, vol.8
, Issue.3
, pp. 299-316
-
-
Benini, L.1
Bogliolo, A.2
De Micheli, G.3
-
5
-
-
0043237598
-
Scheduling with dynamic voltage/speed adjustment using slack reclamation in multi-processor real-time systems
-
July
-
D. ZHU, R. M. AND CHILDERS, B. 2003. Scheduling with dynamic voltage/speed adjustment using slack reclamation in multi-processor real-time systems. IEEE Trans, on Parallel and Distributed Systems 14, 7 (July), 686-700.
-
(2003)
IEEE Trans, on Parallel and Distributed Systems
, vol.14
, Issue.7
, pp. 686-700
-
-
Zhu, R.M.1
Childers, B.2
-
7
-
-
84867263037
-
-
IEM Arm intelligent energy manager
-
IEM. Arm intelligent energy manager, www.arm.com/prod.ucts/cpus/cpu-arch- iem.html.
-
-
-
-
9
-
-
84867263040
-
-
IMX21.Freescale semiconductor
-
IMX21.Freescale semiconductor, www.freescale.com/files/wireless/comm/doc/ brochure/brim21.pdf.
-
-
-
-
10
-
-
0042090423
-
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
-
KWON, W. AND KIM, T. 2003. Formal online methods for voltage/frequency control in multiple clock domain microprocessors. In Proc. of IEEE Design Automation Conference. 125-130.
-
(2003)
Proc. of IEEE Design Automation Conference
, pp. 125-130
-
-
Kwon, W.1
Kim, T.2
-
11
-
-
39849093295
-
Sliding order and sliding accuracy in sliding mode control
-
LEVANT, A. 1993. Sliding order and sliding accuracy in sliding mode control. Int. Journal of Con-trol 58, 1247-1263.
-
(1993)
Int. Journal of Control
, vol.58
, pp. 1247-1263
-
-
Levant, A.1
-
12
-
-
0036864780
-
Dynamic frequency scaling with buffer insertion for mixed workloads
-
Nov
-
Lu, Y., BENINI, L., AND DE MICHELI, G. 2002. Dynamic frequency scaling with buffer insertion for mixed workloads. IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 21, 11 (Nov.), 1284-305.
-
(2002)
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems
, vol.21
, Issue.11
, pp. 1284-1305
-
-
Lu, Y.1
Benini, L.2
De Micheli, G.3
-
14
-
-
77953004688
-
Control theoretic dynamic frequency and voltage scaling for multimedia workloads
-
Lu, Z., HEIN, J., HUMPHREY, M., STAN, M., LACH, J., AND SKADRON, K. 2002. Control theoretic dynamic frequency and voltage scaling for multimedia workloads. In Proc of lnt'l Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES). 156-163.
-
(2002)
Proc of Lnt'l Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES)
, pp. 156-163
-
-
Lu, Z.1
Hein, J.2
Humphrey, M.3
Stan, M.4
Lach, J.5
Skadron, K.6
-
16
-
-
27644555967
-
Parallel modelling paradigm in mul-timedia applications: Mapping and. scheduling onto a multi-processor system-on-chip platform
-
PAZOS, N., MAXIAGUINE, A., IENNE, P., AND LEBLEBICI, Y. 2004. Parallel modelling paradigm in mul-timedia applications: Mapping and. scheduling onto a multi-processor system-on-chip platform. In Proc. of lnt'l Global Signal Processing Conference.
-
(2004)
Proc. of Lnt'l Global Signal Processing Conference
-
-
Pazos, N.1
Maxiaguine, A.2
Ienne, P.3
Leblebici, Y.4
-
20
-
-
33746046436
-
Application-specific power-aware workload allocation for voltage scalable mpsoc platforms
-
RUGGIERO, M., ACQUAVIVA, A., BEETOZZI, D., AND BENINI, L. 2005. Application-specific power-aware workload allocation for voltage scalable mpsoc platforms. In Proc of Int'l Conference on Computer Design (ICCD). 87-93.
-
(2005)
Proc of Int'l Conference on Computer Design (ICCD)
, pp. 87-93
-
-
Ruggiero, M.1
Acquaviva, A.2
Beetozzi, D.3
Benini, L.4
-
21
-
-
0032680041
-
An mpeg-2 decoder case study as a driver for a system level design methodology
-
VAN DER WOLF, P., LIEVERSE, P., GOEL, M., HEI, D. L., AND VISSERS, K. 1999. An mpeg-2 decoder case study as a driver for a system level design methodology. In Proc. of Int'l Workshop on Hardware /Software Codesign (CODES).
-
(1999)
Proc. of Int'l Workshop on Hardware /Software Codesign (CODES)
-
-
Van Der Wolf, P.1
Lieverse, P.2
Goel, M.3
Hei, D.L.4
Vissers, K.5
-
22
-
-
12844283854
-
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
-
Wu, Q., JUANG, P., MARTONOSI, M., AND CLARK, D. W 2004. Formal online methods for voltage/frequency control in multiple clock domain microprocessors. In Proc. of Int'l Conf. Ar-chitectural Support for Programming Languages and Operating Systems (ASPLOS). 248-259.
-
(2004)
Proc. of Int'l Conf. Ar-chitectural Support for Programming Languages and Operating Systems (ASPLOS)
, pp. 248-259
-
-
Wu, Q.1
Juang, P.2
Martonosi, M.3
Clark, D.W.4
-
23
-
-
28244458007
-
Formal control techniques for power-performance management
-
Sept.-Oct
-
Wu, Q., JUANG, P., MARTONOSI, M., PEH, L. S., AND CLARK, D. W 2005. Formal control techniques for power-performance management. IEEE Micro 25, 5 (Sept.-Oct.), 52-62.
-
(2005)
IEEE Micro
, vol.25
, Issue.5
, pp. 52-62
-
-
Wu, Q.1
Juang, P.2
Martonosi, M.3
Peh, L.S.4
Clark, D.W.5
|