Rapid estimation of power consumption for hybrid FPGAS

Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2008, Pages 227-232

  Ho, Chun Hok ^a   Leong, Philip H W ^b   Luk, Wayne ^a   Wilton, Steven J E ^c  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

^c UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BENCHMARKING; ELECTRIC POWER UTILIZATION;

BENCHMARK CIRCUITS; DYNAMIC POWER CONSUMPTIONS; FLOATING-POINT; HYBRID FPGA; POWER CONSUMPTIONS; RAPID ESTIMATIONS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 54949156487     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2008.4629936     Document Type: Conference Paper

References (8)

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