Robust production control policies considering WIP balance and setup time in a semiconductor fabrication line

International Journal of Advanced Manufacturing Technology

Volumn 39, Issue 3-4, 2008, Pages 333-343

  Kim, Sejung ^a   Lee, Young Hoon ^b   Yang, Taeyong ^c   Park, Namkyu ^d  

^a KTF   (South Korea)

^b Yonsei University   (South Korea)

^c Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^d Wayne State University   (United States)

Author keywords

Bottleneck; Heuristic method; Ratio test; Robust production control; Semiconductor fabrication; Setup time; WIP balance

Indexed keywords

ELECTRIC CONDUCTIVITY; HEURISTIC METHODS; INDUSTRIAL ENGINEERING; INDUSTRIAL MANAGEMENT; INTEGER PROGRAMMING; MATHEMATICAL PROGRAMMING; OPTICAL DESIGN; OPTIMAL SYSTEMS; PLASMA WAVES; PROCESS CONTROL; PRODUCTION CONTROL; PRODUCTION ENGINEERING; SEMICONDUCTOR MATERIALS; SOLUTIONS;

BOTTLENECK; COMPUTATIONAL COSTS; CONTROL POLICIES; HEURISTIC APPROACHES; HEURISTIC METHOD; LINEAR RELAXATIONS; MAXIMAL THROUGHPUT; MIXED-INTEGER PROGRAMMING; OBJECTIVE FUNCTIONS; OPTIMAL SOLUTIONS; PHOTOLITHOGRAPHY PROCESS; RATIO TEST; ROBUST PRODUCTION; ROBUST PRODUCTION CONTROL; SEMICONDUCTOR FABRICATION; SEMICONDUCTOR FABRICATION LINES; SETUP TIME; SHORT CYCLES; WEIGHTED-SUM; WIP BALANCE; WORK-IN-PROCESS;

MATHEMATICAL MODELS;

EID: 52649138438     PISSN: 02683768     EISSN: 14333015     Source Type: Journal    
DOI: 10.1007/s00170-007-1208-4     Document Type: Article

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