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Volumn , Issue , 2008, Pages 186-190

Multiple valued logic using 3-state quantum dot gate FETs

Author keywords

[No Author keywords available]

Indexed keywords

MULTIPLE VALUED LOGICS; QUANTUM DOT;

EID: 50449095907     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2008.34     Document Type: Conference Paper
Times cited : (23)

References (10)
  • 4
    • 0000217515 scopus 로고    scopus 로고
    • Trapping of photogenerated carriers by inas quantum dots and persistent photoconductivity in novel gaas/n-algaas field-effect transistor structures
    • Jan
    • G. Yusa and H. Sakaki, "Trapping of photogenerated carriers by inas quantum dots and persistent photoconductivity in novel gaas/n-algaas field-effect transistor structures," Applied Physics Letters, vol. 70, pp. 345-347, Jan. 1997.
    • (1997) Applied Physics Letters , vol.70 , pp. 345-347
    • Yusa, G.1    Sakaki, H.2
  • 6
    • 0029410535 scopus 로고
    • A 200 MHz pipelined multiplier using 1.5 V-supply multiple valued MOS current-mode circuits with dual-rail source-coupled logic
    • T. Hanyu and M. Kameyama, "A 200 MHz pipelined multiplier using 1.5 V-supply multiple valued MOS current-mode circuits with dual-rail source-coupled logic," IEEE Journal for Solid State Circuits, vol. 30, no. 11, 1995.
    • (1995) IEEE Journal for Solid State Circuits , vol.30 , Issue.11
    • Hanyu, T.1    Kameyama, M.2
  • 8
    • 0031626229 scopus 로고    scopus 로고
    • Development of InGaAs-based multiple-junction surface tunnel transistors for multiple-valued logic circuits
    • T. Baba and T. Uemura, "Development of InGaAs-based multiple-junction surface tunnel transistors for multiple-valued logic circuits," in Proceedings of International Symposium on Multiple-Valued Logic, pp. 7-12, 1998.
    • (1998) Proceedings of International Symposium on Multiple-Valued Logic , pp. 7-12
    • Baba, T.1    Uemura, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.