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Volumn , Issue , 2008, Pages 94-99

On the influence of Boolean encodings in SAT-based ATPG for path delay faults

Author keywords

[No Author keywords available]

Indexed keywords

DECISION THEORY; ELECTRIC FAULT CURRENTS; ENCODING (SYMBOLS); MANY VALUED LOGICS; RANDOM ACCESS STORAGE; SIGNAL FILTERING AND PREDICTION;

EID: 50449090695     PISSN: 0195623X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISMVL.2008.19     Document Type: Conference Paper
Times cited : (6)

References (15)
  • 1
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    • G. Smith, "Model for delay faults based upon paths," in Int'l Test Conf., 1985, pp. 342-349.
    • (1985) Int'l Test Conf , pp. 342-349
    • Smith, G.1
  • 2
    • 0030214852 scopus 로고    scopus 로고
    • Classification and identification of nonrobust untestable path delay faults
    • K. Cheng and H. Chen, "Classification and identification of nonrobust untestable path delay faults." IEEE Trans. on CAD, vol. 15, no. 8, pp. 845-853, 1996.
    • (1996) IEEE Trans. on CAD , vol.15 , Issue.8 , pp. 845-853
    • Cheng, K.1    Chen, H.2
  • 3
    • 0032680865 scopus 로고    scopus 로고
    • GRASP: A search algorithm for propositional satisfiability
    • J. Marques-Silva and K. Sakallah, "GRASP: A search algorithm for propositional satisfiability," IEEE Trans. on Comp., vol. 48, no. 5, pp. 506-521, 1999.
    • (1999) IEEE Trans. on Comp , vol.48 , Issue.5 , pp. 506-521
    • Marques-Silva, J.1    Sakallah, K.2
  • 6
    • 30344450270 scopus 로고    scopus 로고
    • An extensible SAT solver
    • SAT 2003
    • N. Eén and N. Sörensson, "An extensible SAT solver," in SAT 2003, LNCS, vol. 2919, 2004, pp. 502-518.
    • (2004) LNCS , vol.2919 , pp. 502-518
    • Eén, N.1    Sörensson, N.2
  • 7
    • 0029697459 scopus 로고    scopus 로고
    • A satisfiability-based test generator for path delay faults in combinational circuits
    • C. Chen and S. K. Gupta, "A satisfiability-based test generator for path delay faults in combinational circuits," in Design Automation Conf., 1996, pp. 209-214.
    • (1996) Design Automation Conf , pp. 209-214
    • Chen, C.1    Gupta, S.K.2
  • 8
    • 84939371489 scopus 로고
    • On delay fault testing in logic circuits
    • C.-J. Lin and S. Reddy, "On delay fault testing in logic circuits," IEEE Trans. on CAD, vol. 6, no. 5, pp. 694-703, 1987.
    • (1987) IEEE Trans. on CAD , vol.6 , Issue.5 , pp. 694-703
    • Lin, C.-J.1    Reddy, S.2
  • 10
    • 2442536097 scopus 로고    scopus 로고
    • Trangen: A SAT-based ATPG for path-oriented transition faults
    • K. Yang, K.-T. Cheng, and L.-C. Wang, "Trangen: a SAT-based ATPG for path-oriented transition faults," in ASP Design Automation Conf., 2004, pp. 92-97.
    • (2004) ASP Design Automation Conf , pp. 92-97
    • Yang, K.1    Cheng, K.-T.2    Wang, L.-C.3
  • 14
    • 0026623575 scopus 로고
    • Test pattern generation using Boolean satisfiability
    • T. Larrabee, "Test pattern generation using Boolean satisfiability," IEEE Trans. on CAD, vol. 11, pp. 4-15, 1992.
    • (1992) IEEE Trans. on CAD , vol.11 , pp. 4-15
    • Larrabee, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.