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Volumn , Issue , 2006, Pages

Skew insensitive physical links for network on chip

Author keywords

[No Author keywords available]

Indexed keywords

CHLORINE COMPOUNDS; COMPUTER ARCHITECTURE; ELECTRIC NETWORK TOPOLOGY; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS;

EID: 50149097340     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANONET.2006.346236     Document Type: Conference Paper
Times cited : (15)

References (15)
  • 1
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chips: A new SoC paradigm
    • Jan
    • L. Benini and G. De Micheli, "Networks on chips: A new SoC paradigm", Computer, 35(1): 70-78, Jan. 2002.
    • (2002) Computer , vol.35 , Issue.1 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 2
    • 50149092603 scopus 로고    scopus 로고
    • M. Coppola, C. Pistritto, R. Locatelli and A. Scandurra STNoC™: An Evolution Towards MPSoC Era, NoC Workshop, march2006, DATE 2006.
    • M. Coppola, C. Pistritto, R. Locatelli and A. Scandurra STNoC™: An Evolution Towards MPSoC Era", NoC Workshop, march2006, DATE 2006.
  • 3
    • 47749123706 scopus 로고    scopus 로고
    • M. Coppola, R. Locatelli, G. Maruccia, L. Pieralisi, A. Scandurra. Spidergon: a novel on-chip communication network, A.Page(s): 15 Digital Object Identifier 10.1109/ISSOC.2004.1411133, SoC 2004, Tampere, November 2004.
    • M. Coppola, R. Locatelli, G. Maruccia, L. Pieralisi, A. Scandurra. Spidergon: a novel on-chip communication network, A.Page(s): 15 Digital Object Identifier 10.1109/ISSOC.2004.1411133, SoC 2004, Tampere, November 2004.
  • 6
    • 4344598358 scopus 로고    scopus 로고
    • A new mesochronous clocking scheme for synchronization in SoC
    • B. Mesgarzadeh, C. Svensson, A. Alvandpour, A new mesochronous clocking scheme for synchronization in SoC, Proc. the ISCAS, 2002, pp. 605-609.
    • (2002) Proc. the ISCAS , pp. 605-609
    • Mesgarzadeh, B.1    Svensson, C.2    Alvandpour, A.3
  • 7
    • 4444339042 scopus 로고    scopus 로고
    • Timing closure through globally synchronous, timing portioned design methodology
    • Edman, C. Svensson, Timing closure through globally synchronous, timing portioned design methodology. Design Automation Conference, 41st Conference on (DAC04), 2004, pp. 71-74.
    • (2004) Design Automation Conference, 41st Conference on (DAC04) , pp. 71-74
    • Edman, C.S.1
  • 8
    • 0029694864 scopus 로고    scopus 로고
    • Self-timed mesochronous interconnections for high-speed VLSI systems
    • S. Kim, R Sridhar, Self-timed mesochronous interconnections for high-speed VLSI systems. 6 Great Lake Symposium on VLSI (glsvlsi), 1996, pp.122-128.
    • (1996) 6 Great Lake Symposium on VLSI (glsvlsi) , pp. 122-128
    • Kim, S.1    Sridhar, R.2
  • 10
    • 0003705271 scopus 로고    scopus 로고
    • An Introduction to Asynchronous Circuit Design
    • Technical Report UUCS-97-013, Computer Science Department, University of Utah, Sep
    • A. Davis and S.M. Nowick, "An Introduction to Asynchronous Circuit Design", Technical Report UUCS-97-013, Computer Science Department, University of Utah, Sep. 1997.
    • (1997)
    • Davis, A.1    Nowick, S.M.2
  • 12
    • 0002391456 scopus 로고
    • Delay-insensitive codes: An overview
    • T. Verhoeff, "Delay-insensitive codes: an overview", Distributed Computing, 3(1): 1-8, 1988.
    • (1988) Distributed Computing , vol.3 , Issue.1 , pp. 1-8
    • Verhoeff, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.