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Volumn , Issue , 2006, Pages 168-173

An active decoupling capacitance circuit for inductive noise suppression in power supply networks

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER DESIGNS; DE-COUPLING CAPACITANCE; DECOUPLING CAPACITORS; HIGH-PERFORMANCE PROCESSORS; INDUCTIVE NOISE; INTERNATIONAL CONFERENCES; OPTIMAL ALLOCATION; POWER SUPPLIES; POWER SUPPLY NETWORKS; POWER-SUPPLY FLUCTUATIONS; VOLTAGE FLUCTUATIONS;

EID: 49749152479     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2006.4380811     Document Type: Conference Paper
Times cited : (1)

References (14)
  • 3
    • 39749198377 scopus 로고    scopus 로고
    • Increasing microprocessor speed by massive application of on-die high-K MIM decoupling capacitors
    • H. Sanchez et al.,"Increasing microprocessor speed by massive application of on-die high-K MIM decoupling capacitors," in Proc.International Solid-State Circuits Conf, 2006, pp. 538-539.
    • (2006) Proc.International Solid-State Circuits Conf , pp. 538-539
    • Sanchez, H.1
  • 4
    • 0036179950 scopus 로고    scopus 로고
    • Decoupling capacitance allocation and its application to power-supply noise-aware floorplanning
    • Jan
    • S. Zhao et al., "Decoupling capacitance allocation and its application to power-supply noise-aware floorplanning," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, issue 1, Jan. 2003, pp. 81-92.
    • (2003) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol.21 , Issue.1 , pp. 81-92
    • Zhao, S.1
  • 5
    • 0344089095 scopus 로고    scopus 로고
    • Optimal decoupling capacitor sizing and placement for standard-cell layout designs
    • April
    • H. Su et al., "Optimal decoupling capacitor sizing and placement for standard-cell layout designs", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, issue 4, April 2003, pp. 428-436.
    • (2003) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , vol.22 , Issue.4 , pp. 428-436
    • Su, H.1
  • 6
    • 27944470412 scopus 로고    scopus 로고
    • Partitioning-based approach to fast on-chip decap budgeting and optimization
    • H Li et al., "Partitioning-based approach to fast on-chip decap budgeting and optimization," in Proc Design Automation Conference, 2005, pp. 170-175.
    • (2005) Proc Design Automation Conference , pp. 170-175
    • Li, H.1
  • 8
    • 0033280878 scopus 로고    scopus 로고
    • On-chip active guard band filters to suppress substrate-coupling noise in analog and digital mixed-signal integrated circuits
    • June
    • K. Makie-Fukuda et al., "On-chip active guard band filters to suppress substrate-coupling noise in analog and digital mixed-signal integrated circuits," in Symp. VLSI Circuits Dig. Tech. Papers, June 1999, pp. 57-60.
    • (1999) Symp. VLSI Circuits Dig. Tech. Papers , pp. 57-60
    • Makie-Fukuda, K.1
  • 9
    • 0033683215 scopus 로고    scopus 로고
    • Active substrate noise suppression in mixed-signal circuits using on-chip driven guard rings
    • May
    • W. Winkler et al., "Active substrate noise suppression in mixed-signal circuits using on-chip driven guard rings," in Proc Custom Integrated Circuits Conference, May 2000, pp. 357-360.
    • (2000) Proc Custom Integrated Circuits Conference , pp. 357-360
    • Winkler, W.1
  • 10
    • 11944270983 scopus 로고    scopus 로고
    • An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs
    • Jan
    • T. Tsukada et al., "An on-chip active decoupling circuit to suppress crosstalk in deep-submicron CMOS mixed-signal SoCs," in Journal of Solid-State Circuits, 40-1, Jan 2005, pp. 67-79.
    • (2005) Journal of Solid-State Circuits , vol.40 -1 , pp. 67-79
    • Tsukada, T.1
  • 11
    • 0034428197 scopus 로고    scopus 로고
    • An on-chip voltage regulator using switched decoupling capacitors
    • Feb
    • M. Ang et al., "An on-chip voltage regulator using switched decoupling capacitors," in Proc. of International Solid-State Circuits Conference, Feb 2000, pp. 438-439.
    • (2000) Proc. of International Solid-State Circuits Conference , pp. 438-439
    • Ang, M.1
  • 12
    • 34548824625 scopus 로고    scopus 로고
    • A circuit for reducing large transient current effects on processor power grids
    • E. Hailu et al., "A circuit for reducing large transient current effects on processor power grids," in Proceedings of IEEE International Solid-State Circuits Conference, 2006, pp. 548-549.
    • (2006) Proceedings of IEEE International Solid-State Circuits Conference , pp. 548-549
    • Hailu, E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.