On the improvement of statistical timing analysis

IEEE International Conference on Computer Design, ICCD 2006

Volumn , Issue , 2006, Pages 37-42

  Garg, Rajesh ^a   Jayakumar, Nikhil ^a   Khatri, Sunil P ^a  

^a Department of Electrical and Computer Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT DELAYS; COMPUTER DESIGNS; DELAY DISTRIBUTIONS; FALSE PATHS; FEATURE SIZES; INTERNATIONAL CONFERENCES; PROCESS VARIATIONS; STATIC TIMING ANALYSIS; STATISTICAL STATIC TIMING ANALYSIS; STATISTICAL TIMING ANALYSIS; TIMING ANALYSIS; VLSI FABRICATION; WORST CASE;

OPTICAL DESIGN; STATISTICAL METHODS; SYSTEMS ANALYSIS; TIME MEASUREMENT; TIMING DEVICES;

STATIC ANALYSIS;

EID: 49749148730     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2006.4380791     Document Type: Conference Paper

References (12)

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