A mapping framework for guided design space exploration of heterogeneous MP-SoCs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 780-783

  Ristau, Bastian ^a   Limberg, Torsten ^a   Fettweis, Gerhard ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; SPACE RESEARCH; TESTING;

DESIGN SPACE EXPLORATION; DESIGN SPACES; DESIGN STAGES; DIE SIZE; FAST EVALUATION; IN-CHIP; KEY FACTORS; KNOW-HOW; PROGRAMMABILITY; SIMULATION MODELLING; SIMULINK; SYSTEMC; TIME-TO-MARKET;

INDUSTRIAL ENGINEERING;

EID: 49749132305     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484910     Document Type: Conference Paper

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