Software performance estimation in MPSoC design

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2007, Pages 38-43

  Oyamada, Marcio ^a,b   Wagner, Flávio R ^a   Bonaciu, Marius ^b   Cesario, Wander ^c   Jerraya, Ahmed ^b  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^b TIMA LABORATORY   (France)

^c MnD ^*  (France)

Author keywords

[No Author keywords available]

Indexed keywords

ARTIFICIAL INTELLIGENCE; BREEDER REACTORS; BUSES; COMPUTER AIDED DESIGN; COMPUTER SOFTWARE; DIGITAL INTEGRATED CIRCUITS; EMBEDDED SYSTEMS; ESTIMATION; INDUSTRIAL ENGINEERING; INTEGRATED CIRCUITS; MECHANIZATION; MODAL ANALYSIS; NETWORK ARCHITECTURE; NEURAL NETWORKS; SOFTWARE DESIGN; SPACE RESEARCH; SYSTEMS ANALYSIS; TOOLS;

CASE STUDIES; CURRENT SOFTWARE; CYCLE-ACCURATE SIMULATION; DESIGN AUTOMATION CONFERENCE (DAC); DESIGN SPACE EXPLORATION (DSE); DESIGN VALIDATION (DV); ESTIMATION RESULTS; ESTIMATION TIME; FAST EVALUATION; FUNCTIONAL MODELING; HARDWARE AND SOFTWARE; INTEGRATED METHODOLOGY; MPSOC DESIGNS; PERFORMANCE ANALYSES; SIMULATION-BASED; SOFTWARE PERFORMANCES; SOUTH PACIFIC; SYSTEM DESIGNS; SYSTEM LEVELS; VIRTUAL PLATFORM (VIP); VIRTUAL PROTOTYPES;

COMPUTER SIMULATION;

EID: 46649083233     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2007.357789     Document Type: Conference Paper

References (16)

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