Statistical noise margin estimation for sub-threshold combinational circuits

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 176-179

  Pu, Yu ^a,b,c   De Gyvez, José Pineda ^a,b   Corporaal, Henk ^a   Ha, Yajun ^c  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b NXP Research   (Netherlands)

^c NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; ESTIMATION; INDUSTRIAL ENGINEERING; MONTE CARLO METHODS; STATISTICAL METHODS;

AFFINE ARITHMETICS; COMBINATIONAL CIRCUITS; DESIGN AUTOMATION CONFERENCE; EQUIVALENT RESISTANCE; FAST ESTIMATION; INPUT VECTORS; MONTE-CARLO SIMULATIONS; NEW APPROACHES; NOISE MARGIN; NOISE MARGINS; PROCESS VARIATIONS; RUNNING TIME; SOUTH PACIFIC; STATISTICAL APPROACHES; STATISTICAL METHODOLOGY; STATISTICAL NOISE; SUB-THRESHOLD DESIGN; SUPPLY VOLTAGES;

NETWORKS (CIRCUITS);

EID: 49549125611     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483935     Document Type: Conference Paper

References (11)

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