Statistical gate delay model for multiple input switching

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 286-291

  Fukuoka, Takayuki ^a   Tsuchiya, Akira ^a   Onodera, Hidetoshi ^a,b  

^a KYOTO UNIVERSITY   (Japan)

^b CREST ^*

Author keywords

[No Author keywords available]

Indexed keywords

ADMINISTRATIVE DATA PROCESSING; CELLULAR RADIO SYSTEMS; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING; MONTE CARLO METHODS; STATIC ANALYSIS; STATISTICAL METHODS; TIMING DEVICES; VOLTAGE CONTROL;

CALCULATION METHODS; DESIGN AUTOMATION CONFERENCE; GATE DELAYS; MONTE-CARLO SIMULATIONS; MULTIPLE INPUTS; MULTIPLE-INPUT SWITCHING; SINGLE INPUT; SOUTH PACIFIC; SPICE BASED; STATISTICAL STATIC TIMING ANALYSIS; SWITCHING MODELS;

SWITCHING CIRCUITS;

EID: 49549099010     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483959     Document Type: Conference Paper

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