A 1GHz fractional-N PLL clock generator will low-OSB δσ modulation and FIR-embedded noise filtering

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 346-348

  Yu, Xueyi ^a   Sun, Yuanfeng ^a   Zhang, Li ^a   Rhee, Woogeun ^a   Wang, Zhihua ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CLOCKS; FIR FILTERS; PHASE LOCKED LOOPS;

ACTIVE CIRCUITS; CLOCK GENERATOR; EMBEDDED NOISE; FIR FILTERING; FRACTIONAL-N PLL; FREQUENCY RESOLUTIONS; OUT OF BAND; QUANTIZATION NOISE;

MODULATION;

EID: 49549098193     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523199     Document Type: Conference Paper

References (7)

1. M. Kobuko, T. Kawamoto, T. Oshima et al., "Spread-Spectrum Clock Generator for Serial ATA using Fractional PLL Controlled by ΔΣ Modulator with Level Shifter," ISSCC Dig. Tech. Papers, pp.160-161, Feb. 2005.
2. H-R. Lee, O. Kim, G. Ahn et al., "A Low-Jitter 5000p pm Spread Spectrum Clock Generator for Multi-Channel SATA Transceiver in 0.18μm CMOS," ISSCC Dig. Tech. Papers, pp.162-163, Feb. 2005.
3. A. Swaminathan, K. J. Wang and I. Galton, "A Wide-Bandwidth 2.4GHz ISM-Band Fractional-N PLL with Adaptive Phase-Noise Cancellation", ISSCC Dig. Tech. Papers, pp.302-303, Feb. 2007.
4. M. Gupta and B-S. Song, "A 1.8GHz Spur-Cancelled Fractional-N Frequency Synthesizer with LMS-Based DAC Gain Calibration", ISSCC Dig. Tech. Papers, pp. 478-479, Feb. 2006.
5. S. E. Meninger and M. H. Perrott, "A 1-MHz Bandwidth 3.6-GHz 0.18-μm CMOS Fractional-N Synthesizer Utilizing a Hybrid PFD/DAC Structure for Reduced Broadband Phase Noise," IEEE J. Solid-State Circuits, pp. 966-980, Apr. 2006.
6. T. Riley, N. Filial, Q. Du et al., Techniques for In-Band Phase Noise Reduction in ΔΣ Synthesizers," IEEE Trans. on Circuits Syst. II, pp. 794-803, Nov. 2003.
7. B. Chi, X. Yu, W. Rhee et al., "A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider," ISCAS, pp. 3051-3054, 2007.