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Proceeding of 2007 International Workshop on Electron Devices and Semiconductor Technology, IEDST 2007

Volumn , Issue , 2007, Pages 74-77

M/Bi3.4La0.6Ti3O12/I/Si capacitors for the application in FEDRAM

(3) Xie, Dan a Ren, Tianling a Liu, Litian a

a TSINGHUA UNIVERSITY (China)

Author keywords

Bismuth compounds; FeFET; Ferroelectric films; Ferroelectric memories capacitors

Indexed keywords

BUFFER LAYERS; BUFFER STORAGE; DEPOSITION; FERROELECTRIC DEVICES; FERROELECTRIC FILMS; FERROELECTRICITY; INTERFACE STATES; LANTHANUM COMPOUNDS; POLARIZATION; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICES; SILICA; SILICON OXIDES; THIN FILMS; TITANIUM COMPOUNDS;

BI4 TI3 O12; C-V CHARACTERIZATION; FEFET; FERROELECTRIC MEMORY; INJECTION EFFECTS; PHYSICAL MODEL; POLARIZATION STATE;

BISMUTH COMPOUNDS;

EID: 47749126166 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/edst.2007.4289781 Document Type: Conference Paper

Times cited : (2)

References (9)

1
- 0009770297
- Current status and properties of FET-type ferroelectric memories
- H. Ishiwara, "Current status and properties of FET-type ferroelectric memories", J sem. Tech. &Sci., Vol.1, pp. 1-14, 2001.
- (2001) J sem. Tech. &Sci , vol.1 , pp. 1-14
- Ishiwara, H.¹

2
- 0001091207
- High-performance metal-ferroelectric-insulator-semiconductor structures with a damage-free and hydrogen-free silicon-nitride buffer layer
- Y. Fujisakia, T. Kijima, and H. Ishiwara, "High-performance metal-ferroelectric-insulator-semiconductor structures with a damage-free and hydrogen-free silicon-nitride buffer layer", Appl. Phys. Lett., Vol.78, pp. 1285-1287, 2001.
- (2001) Appl. Phys. Lett , vol.78 , pp. 1285-1287
- Fujisakia, Y.¹ Kijima, T.² Ishiwara, H.³

3
- 0031124778
- Nonvolatile memory operations of metal-ferroelecrtic-insulator-semiconductor (MFIS) FET's using PLZT/STO/Si (100) structures
- Apr
- E. Tokumitsu, R. Nakamura, and H. Ishiwara, "Nonvolatile memory operations of metal-ferroelecrtic-insulator-semiconductor (MFIS) FET's using PLZT/STO/Si (100) structures," IEEE Electron Device Lett., vol.18, pp. 160-162, Apr. 1997.
- (1997) IEEE Electron Device Lett , vol.18 , pp. 160-162
- Tokumitsu, E.¹ Nakamura, R.² Ishiwara, H.³

4
- 0032094706
- Metal ferroelectric-semiconductor (MFS) FET's using LiNbO /Si (100) structures for nonvolatile memory operation
- June
- K.H. Kim, "Metal ferroelectric-semiconductor (MFS) FET's using LiNbO /Si (100) structures for nonvolatile memory operation," IEEE Electron Device Lett., vol. 19, pp. 204-206, June 1998.
- (1998) IEEE Electron Device Lett , vol.19 , pp. 204-206
- Kim, K.H.¹

5
- 0036477686
- 9/SiN/Si gate structure
- 9/SiN/Si gate structure", IEEE Electron Device Letters, vol. 23, pp. 82-84, 2002.
- (2002) IEEE Electron Device Letters , vol.23 , pp. 82-84
- Kim, K.H.¹ Han, J.P.² Jung, S.W.³ Ma, T.P.⁴

6
- 47749107781
- A ferroelectric dynamic random access memory
- T.P.Ma, J.P. Han, A ferroelectric dynamic random access memory, U.S.Patent 6067244 (2000)
- (2000) U.S.Patent 6067244
- Ma, T.P.¹ Han, J.P.²

7
- 0000173547
- A capacitor-less ferroelectric DRAM cell (FEDRAM)
- J.P. Han, T.P.Ma, A capacitor-less ferroelectric DRAM cell (FEDRAM), Integ. Ferro., vol. 27, pp. 1053-1062, 1999.
- (1999) Integ. Ferro , vol.27 , pp. 1053-1062
- Han, J.P.¹ Ma, T.P.²

8
- 0009090698
- 9 on Si
- 9 on Si," Integ. Ferro., vol. 34, pp. 1505-1512, 2000.
- (2000) Integ. Ferro , vol.34 , pp. 1505-1512
- Han, J.P.¹ Guo, X.² Broadbridge, C.C.³ Ma, T.P.⁴ Lis, A.⁵ Cantoni, M.⁶ Sallese, J.M.⁷ Fazan, P.⁸

9
- 33751196614
- The effect of substrate materials on orientation degree of lanthanum-substituted bismuth titanate thin films
- D. Xie, T.L. Ren, L.T. Liu, "The effect of substrate materials on orientation degree of lanthanum-substituted bismuth titanate thin films", Integ. Ferro., Vol. 65, pp.3-+, 2004
- (2004) Integ. Ferro , vol.65
- Xie, D.¹ Ren, T.L.² Liu, L.T.³

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