Power reduction of functional units considering temperature and process variations

Proceedings of the IEEE International Frequency Control Symposium and Exposition

Volumn , Issue , 2008, Pages 533-538

  Kannan, Deepa ^a   Shrivastava, Aviral ^a   Bhardwaj, Sarvesh ^a   Vrudhula, Sarma ^a  

^a ARIZONA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BINDING MECHANISMS; DEVICE DIMENSIONS; FUNCTIONAL UNITS (FU); INTERNATIONAL CONFERENCES; LEAKAGE POWER; POWER DENSITY (PD); POWER OPTIMIZATION; POWER REDUCTIONS; PROCESS VARIATIONS; STANDARD DEVIATION (STD); SUPERSCALAR PROCESSORS; TECHNOLOGY SCALING; TOTAL ENERGY CONSUMPTION; VLSI DESIGNS;

ENERGY POLICY; MECHANISMS; STANDARDS;

DIGITAL SIGNAL PROCESSING;

EID: 47649085412     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.2008.81     Document Type: Conference Paper

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