Emulating optimal replacement with a shepherd cache

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2007, Pages 445-454

  Rajan, Kaushik ^b   Govindarajan, R ^a,b  

^a Indian Institute of Science

^b INDIAN INSTITUTE OF SCIENCE   (India)

Author keywords

[No Author keywords available]

Indexed keywords

ASSOCIATIVE CACHE; INTERNATIONAL SYMPOSIUM; L2 CACHE; MEMORY ACCESSES; MICRO ARCHITECTURES; OPTIMAL REPLACEMENT POLICY; TEMPORAL LOCALITY; VICTIM BUFFER;

ARSENIC COMPOUNDS; GALLIUM ALLOYS; SEMICONDUCTOR COUNTERS;

CACHE MEMORY;

EID: 47349114259     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MICRO.2007.25     Document Type: Conference Paper

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