Accurate software performance estimation using domain classification and neural networks

Proceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004

Volumn , Issue , 2004, Pages 175-180

  Oyamada, Márcio Seiji ^a,b   Zschornack, Felipe ^a   Wagner, Flávio Rech ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^b UNIVERSIDADE ESTADUAL DO OESTE DO PARANÁ   (Brazil)

Author keywords

Embedded software; Neural networks; Performance estimation

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; ELECTRIC POWER UTILIZATION; EMBEDDED SYSTEMS; ESTIMATION; NEURAL NETWORKS; PERFORMANCE; REDUCED INSTRUCTION SET COMPUTING;

DATAFLOW; EMBEDDED SOFTWARE; LEAVE-ONE-OUT (LOO); PERFORMANCE ESTIMATION;

COMPUTER SOFTWARE;

EID: 14244263638     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1016568.1016617     Document Type: Conference Paper

References (17)

1. G. Bontempi and W. Kruijtzer. A Data Analysis Method for Software Performance Prediction. In Design, Automation and Test in Europe, pages 971-976. IEEE Computer Society Press, 2002.
2. A. Colin and I. Puaut. Worst Case Execution Time Analysis for a Processor with Branch Prediction. Journal of Real-Time Systems, 18(2-3):249-274, 2000.
3. J. Engblom, A. Ermedahl, and F. Stappert. A Worst-Case Execution-Time Analysis Tool Prototype for Embedded Real-Time Systems. In RTTOOLS'2001 - Workshop on Real-Time Tools, Aalborg, Denmark, 2001.
4. J. A. Freeman and D. M. Skapura. Neural Networks: Algorithms, Applications, and Programming Techniques. Addison-Wesley Publisher, 1992.
5. P. Giusto, G. Martin, and E. Harcourt. Reliable Estimation of Execution Time of Embedded Software. In Design, Automation and Test in Europe, pages 580-589. IEEE Computer Society Press, 2001.
6. GNU. GCC - GNU Compiler Collection, http://www.gnu.org
7. A. Hergenhan and W. Rosenstiel. Static Timing Analysis of Embedded Software on Advanced Processor Architectures. In Design, Automation and Test in Europe, pages 552-559. IEEE Computer Society Press, 2000.
8. M. Lajolo, M. Lazarescu, and A. Sangiovanni-Vincentelli. A Compilation-based Software Estimation Scheme for Hardware/Software Co-simulation. In Proceedings of the 7th International Workshop on Hardware/Software Codesign, pages 85-89. ACM Press, 1999.
9. X. Li, T. Mitra, and A. Roychoudhury. Accurate Timing Analysis by Modeling Caches, Speculation and their Interaction. In Design Automation Conference, pages 466-471. ACM Press, 2003.
10. Y.-T. S. Li and S. Malik. Performance Analysis of Embedded Software Using Implicit Path Enumeration. In Design Automation Conference, pages 456-461. ACM Press, 1995.
11. Y.-T. S. Li, S. Malik, and A. Wolfe. Performance Estimation of Embedded Software with Instruction Cache Modeling. In IEEE/ACM International Conference on Computer-Aided Design, pages 380-387. IEEE Computer Society Press, 1995.
12. S.-S. Lim, J. H. Han, J. Kim, and S. L. Min. A Worst Case Timing Analysis Technique for Multiple-Issue Machines. In IEEE Real-Time Systems Symposium, page 334. IEEE Computer Society Press, 1998.
13. Microlib. PowerPC 750 Simulator. http://www.microlib.org/G3/PowerPC750. php
14. E. Moser and W. Nebel. Case Study: System Model of Crane and Embedded Control. In Design, Automation and Test in Europe, page 721. IEEE Computer Society Press, 1999.
15. F. Stappert. WCET - Benchmarks. http://c-lab.de/home/en/download. html#wcet.
16. S. Thesing, J. Souyris, R. Heckmann, F. Randimbivololona, M. Langenbach, R. Wilhelm, and C. Ferdinand. An Abstract Interpretation-Based Timing Validation of Hard Real-Time Avionics. In: International Performance and Dependability Symposium (IPDS). IEEE Computer Society Press, June 2003.
17. F. Wolf and R. Ernst. Intervals in Software Execution Cost Analysis. In: International Symposium on System Synthesis, pages 130-135. ACM Press, 2000.