Optimal clock skew scheduling tolerant to process variations

Proceedings - Design Automation Conference

Volumn , Issue , 1996, Pages 623-628

  Neves, Jose Luis ^a   Friedman, Eby G ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CRITICAL PATH ANALYSIS; DELAY CIRCUITS; ELECTRIC NETWORK PARAMETERS; OPTIMIZATION; STORAGE ALLOCATION (COMPUTER); TIMING CIRCUITS; ULSI CIRCUITS;

CLOCK PATH DELAYS; CLOCK SKEW;

DISTRIBUTED COMPUTER SYSTEMS;

EID: 0029720911     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/240518.240636     Document Type: Conference Paper

References (12)