FPGA implementations of the des and triple-des masked against power analysis attacks

Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2006, Pages 791-794

  Standaert, F X ^a   Rouvroy, G ^a   Quisquater, J J ^a  

^a Microelectronics Laboratory   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; FUZZY LOGIC;

BOOLEAN MASKING; EMBEDDED MEMORIES; FIELD PROGRAMMABLE LOGIC (FPL); FPGA IMPLEMENTATIONS; INTERNATIONAL CONFERENCES; LOGIC RESOURCES; POWER ANALYSIS ATTACKS; RECONFIGURABLE DEVICES; SMART CARD; SUBSTITUTION TABLES; XILINX VIRTEX;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 46249103560     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2006.311315     Document Type: Conference Paper

References (20)

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