A 0.2 V, 7.5 μW, 20kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS

ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 206-209

  Wismar, Ulrik ^a   Wisland, Dag ^b   Andreani, Pietro ^a  

^a TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^b UNIVERSITY OF OSLO   (Norway)

Author keywords

[No Author keywords available]

Indexed keywords

ACOUSTIC INTENSITY; DIGITAL ARITHMETIC; MODULATION; SIGNAL TO NOISE RATIO;

CMOS PROCESSING; EUROPEAN; FIGURE-OF-MERIT (FOM); POWER CONSUMPTION (CE); SOLID-STATE CIRCUITS CONFERENCE; SUPPLY VOLTAGES; WIDE-RANGE;

MODULATORS;

EID: 44849092543     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430281     Document Type: Conference Paper

References (11)

1. K. Pun, S. Chatterjee, and P. Kinget, "A 0.5V 74dB SNDR 25kHz CT ΔΣ modulator with return-to-open DAC," Proc. IEEE International Solid-State Circuits Conference, pp. 72-73, 2006.
2. L. Yao, M. Steyaert, and W. Sansen, "A 1-V 140-μW 88-dB audio sigma-delta modulator in 90-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 39(11), pp. 1809-1818, 2004.
3. M. Høvin, A. Olsen, T. Lande, and C. Toumazou, "Delta-sigma modulators using frequency-modulated intermediate values," IEEE Journal of Solid-State Circuits, vol. 32(1), pp. 13 -22, 1997.
4. U. Wismar, D. Wisland, and P. Andreani, "0.2V 0.44μW 20kHz Analog to Digital ΣΔ Modulator with 57fJ/conversion FoM," Proc. IEEE European Solid-State Circuit Conference, pp. 187-190, 2006.
5. S. Aunet, Y. Berg, and T. Sæther, "Real-time reconfigurable linear threshold elements implemented in floating-gate cmos," IEEE Transactions on Neural Networks, vol. 14(5), pp. 1244-1256, 2003.
6. U. Wismar, D. Wisland, and P. Andreani, "Linearity of bulk-controlled inverter ring VCO in weak and strong inversion," Analog Integrated Circuits and Signal Processing, vol. 50(1), pp. 59-67, 2007.
7. A. Hajimiri, S. Limotyrakis, and T. Lee, "Jitter and phase noise in ring oscillators," Solid-State Circuits, IEEE Journal of, vol. 34(6), pp. 790 -804, 1999.
8. R. Van de Plassche, CMOS integrated analog-to-digital and digital-to-analog converters, 2nd edn., Boston: Kluwer Academic Publishers, 2003.
9. A. Baschirotto, S. D'Amico, and P. Makovati, Low-Voltage, Low-Power Basic Circuits, Dordrecht, The Netherlands: Analog Circuit Design, Springer, 2006.
10. M. E. Hoevin, D. T. Wisland, J. T. Marienborg, T. S. Lande, et al., "Pattern Noise in the Frequency ΔΣ Modulator," Analog Integrated Circuits and Signal Processing, vol. 26(1), pp. 75-82, 2001.
11. P. Andreani and X. Wang, "On the phase-noise and phase-error performances of multiphase LC CMOS VCOs," IEEE Journal of Solid-State Circuits, vol. 39(11), pp. 1883-1893, 2004.