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Volumn 5, Issue 4, 2008, Pages 685-688

Realization of nano-resister employing single electron transistor

Author keywords

Macromodeling; Nanoresister; SET; SPICE

Indexed keywords

COMPUTER SIMULATION; DRAIN CURRENT; MASKS; SEMICONDUCTOR QUANTUM DOTS; SPICE; TRANSISTORS; ULSI CIRCUITS;

EID: 44649095238     PISSN: 15461955     EISSN: None     Source Type: Journal    
DOI: 10.1166/jctn.2008.038     Document Type: Article
Times cited : (4)

References (10)
  • 9
    • 77954847606 scopus 로고    scopus 로고
    • CMOS Digital Integrated Circuits:, Tata McGraw-Hill Publishing, Delhi
    • S.-M. Kang and Y. Lablebici, CMOS Digital Integrated Circuits: Analysis & Design, Tata McGraw-Hill Publishing, Delhi (2003).
    • (2003) Analysis & Design
    • Kang, S.-M.1    Lablebici, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.